dgilmore changed the topic of #fedora-riscv to: Fedora on RISC-V https://fedoraproject.org/wiki/Architectures/RISC-V || Logs: https://libera.irclog.whitequark.org/fedora-riscv || Alt Arch discussions are welcome in #fedora-alt-arches
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<davidlt> FYI, I am compiling GCC 13 on 64-core machine in Fedora container with podman + crun :)
<davidlt> LTO even on C920 is highly expensive.
<davidlt> So far I would less cores, but more faster cores.
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<rwmjones> davidlt: I'm back!
<davidlt> rwmjones, hi
<rwmjones> I'm also writing an article for RHRQ about RISC-V, in case there's anything you think is important to say
<davidlt> rwmjones, is this a generic article?
<rwmjones> I have very unclear instructions at the moment (also the deadline is like 2 weeks away)
<rwmjones> it's a public article for a research-type audience
<davidlt> I just pulled the latest PDF with it
<rwmjones> so obviously nothing NDA and has to appeal to the research crowd a bit
<rwmjones> the one with paul & orran on the cover?
<davidlt> Yes
<rwmjones> there was a previous article about risc-v but that mainly talked about using softcores (https://research.redhat.com/blog/article/risc-v-for-fpgas-benefits-and-opportunities/)
<rwmjones> which is not that interesting for us really (but appeals to researchers)
<davidlt> So for researches it's probably about RV International, how it's royalty free, open source cores, ability to influence development in RVI, or have their own custom extensions for specific workloads?
<davidlt> That's basically the main unique point compared to x86 and aarch64
<rwmjones> yup, also I want to talk a bit about RISE
<davidlt> Mentioning RISE would be good, but again not really a research thing (but everyone is mentioning RISE in their slides it seems).
<davidlt> rwmjones, would you be interested in talking to bootflow folks at RH? ;)
<rwmjones> who is doing that now?
<davidlt> No idea
<rwmjones> is that pjones
<davidlt> What I need is for Fedora to start updating their GRUB2 and gnu-efi.
<davidlt> The RH shim depends also on gnu-efi. Also thers is old PR to add riscv to the shim, which didn't go anywhere.
<rwmjones> what's the PR link?
<davidlt> GRUB2 is at RC, and gnu-efi 3.0.17 + riscv backports from master would be nice.
<davidlt> No
<rwmjones> I've never heard of gnu-efi until just now
<davidlt> I am destroying our infra to attempt to do Pungi composes, and these things showing up :)
<davidlt> none of these yet produced anything useful
<davidlt> Folks want bootable (via network) setup, containers, proper disk images, UEFI, etc.
<davidlt> It's hard to deliver that without a proper Pungi compose with lorax, and ImageFactory, etc.
<rwmjones> tbh I think the best approach is to ask on the appropriate mailing list
<davidlt> This also comes with some cost too, but let's see what happens.
<rwmjones> I've never used any of that stuff
<davidlt> rwmjones, same here, learning on the spot ;) I bet you have a better reach within RH.
<rwmjones> if you know who I should ask I will approach them for you
<davidlt> I would love to avoid touching those packages. So far I am just trying to work around them (it's not like we really need a shim right now).
<davidlt> javierm, mention some names a few days ago.
<davidlt> I bet there are multiple folks. Like shim seems to be managed by another one.
<davidlt> Ah, it's Peter Jones :)
<davidlt> Basically it would be nice to port/update anything under rhboot GH if it needs some riscv touches.
<davidlt> gnu-efi 3.0.17 seems to have riscv64, but there are another 5-10 patches in the master afterwards.
<davidlt> old attempt to get riscv support to rhboot/shim is here: https://github.com/rhboot/shim/pull/420
<javierm> davidlt: as mentioned, I know that pjones is working on a rebase for grub2 and gnu-efi, don't know what's the shim state
<javierm> but also, we didn't use shim for armv7 when RH supported, so we could do the same for riscv I think
<davidlt> javierm, it seems Canonical did the initial port for shim :)
<davidlt> javierm, riscv supports UEFI + ACPI, so I bet we want to match exactly what x86_64 and aarch64 does.
<javierm> davidlt: fair
<davidlt> Hopefully this time I removed shim from lorax templates (TBD).
<davidlt> The thing is that I will forget all about this sooner than later. I am jumping between way too many things to properly focus on anything.
<davidlt> rwmjones, I will sent an email to pjones and CC you in a bit (before I forget)
<rwmjones> sure
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<davidlt> Interesting that StarFive next IP incl. bitmanip, hypervisor and vector
<davidlt> Also big.little
<davidlt> JH8100 is 8-core design with two clusters.
<davidlt> but doesn't incl. IOMMU and AIA
<davidlt> MilkV Pioneer preorder: https://arace.tech/collections/milk-v-pioneer
<davidlt> High perf cluster is A76 level, and efficiency one is A75 level perf.
<davidlt> If that's 8-core design, it would be epic.
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<sorear> was there news about jh8100?
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<davidlt> sorear, not really. They talked again about their in house developed IP and said that JH8100 implements dual cluster, with high-perf and efficiency.
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<conchuod> 1500+, lolno
<davidlt> conchuod, it might cheaper than buying multiple SBCs to achieve the same perf.
<conchuod> For your use case, yeah
<davidlt> GCC is still cooking
<davidlt> but it's like roller coaster
<davidlt> Those link stage arrives and it's time for LTO it's just one process (one core) for even 1+ hour.
<conchuod> For me as a punter that just wants to test things etc its far too expensive
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<davidlt> conchuod, oh yeah, for sure
<conchuod> I'm really surprised though, I didn't expect it to be cheap.
<davidlt> I kinda hope JH8100 happens sooner than later, and it requires a lot less upstreaming compared to JH7110
<conchuod> I'm hoping that the starfive people learn a lot from the 7110 & apply it to that.
<davidlt> I bet it will be 8-core design, with A76 and A75 perf that would be a killer too (I expect similar price point)
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<conchuod> They seem to have so far, so I'm pretty hopeful :)
<davidlt> I am not sure TH1520 will get similar amount of upstreaming effort
<davidlt> and I love vendors that upstream their stuff
<conchuod> thead seem completely uninterested in it
<davidlt> we don't have Horse Creek, not sure if it's happening this year (based on recent Intel comments)
<conchuod> they have their own reyvos distro & seem to just care about that
<davidlt> The thing about T-HEAD is that Alibaba have tons of money. They can do whatever custom internally and support it.
<conchuod> It prob saves me heartache arging about random bindings if it is done by community people.
<davidlt> It probably works for them and that's fine.
<sorear> i'm not sure "learn from the 7110" is useful framing
<davidlt> It would be nice to see Ventana stuff. I doubt anyone will be able to afford it.
<conchuod> what do you mean by that sorear?
<conchuod> I dunno what "useful framing" means.
<sorear> if it requires less upstreaming it'll be because the peripherals are shared with the 7110 and already upstream, not because the peripherals themselves are somehow magically better
<davidlt> I also saw a news article about T-HEAD, StarFive, Nuclei and some others forming IP alliance in China regarding RISCV.
<conchuod> Oh I didn't mean in terms of hardware.
<davidlt> StarFive had their 1st time experience working upstream. Basically 101.
<conchuod> I meant in terms of the process of upstreaming things to the various projects, they'll hopefully have an easier time of things for the 8100.
<davidlt> Originally they didn't plan doing that themselves.
<sorear> it would be nice if we had open standards for the uncore stuff so every new vendor doesn't have to upstream a bunch of clock drivers
<conchuod> Maybe drew & jisheng will end up getting through a lot of the 1520, since it is mostly using dw peripherals.
<conchuod> :copium: The RPMI spec will negate the need for 728 clock drivers.
<davidlt> Yeah, TH1520 is mostly 3rd party IP, just a few bits have custom DT strings (probably for quirks?).
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