dgilmore changed the topic of #fedora-riscv to: Fedora on RISC-V https://fedoraproject.org/wiki/Architectures/RISC-V || Logs: https://libera.irclog.whitequark.org/fedora-riscv || Alt Arch discussions are welcome in #fedora-alt-arches
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<davidlt[m]> Note that the slide shows RV64GBC
<davidlt[m]> Which is probably not really correct as B as-is doesn't exist anymore, I think
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<davidlt[m]> B is now 4 separate extensions, instructions grouped for specific domains
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<organizedglobals> How does the release of IBMs POWER10 design specifications improve or impact the development of RISCV?
<organizedglobals> https://youtu.be/27VRdI2BGWg
<organizedglobals> Their neural TOPS aren't as good as SBC/mobile SoCs, but that doesn't sound like it was a major feature compared to the other improvements.
<organizedglobals> * good as *current* SBC/mobile SoCs,
<organizedglobals> * Their single core neural TOPS, * good as _current_ SBC/mobile SoCs,
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