15:27 <Esmil> arnd: Ugh, I messed up and forgot to include <linux/io-64-nonatomic-lo-hi.h> in drivers/reset/reset-starfive-jh7100.c so now compile testing fails on 32bit architectures without readq :( Do you want a patch, should I redo the pull-request or how is easiest fixed?

17:53 <geertu> Esmil: The easiest is to just send a patch to soc@...

17:57 <Esmil> geertu: will do, thanks

18:49 <arnd> Esmil: are you sure the device needs lo-hi and not li-lo when doing 32-bit access?

18:50 <arnd> lo-hi is more likely but it really depends on the device

18:54 <Esmil> it shouldn't matter. it just does rmv to change 1 bit at a time

18:54 <Esmil> *read-modify-write

20:35 <arnd> Esmil: usallly it matters which bits you change, the difference between devices is whether the 32 bits at the lower address are the upper or the lower half of the 64-bit word

20:56 <Esmil> arnd: The thing is that it's actually 4 32bit registers where each bit controls a different reset line. Originally I'd access them with readl/writel, but Andy insisted we use 64bit readq/writeq. So when changing a single bit under a lock the nonatomic wrappers will do two readl's on two adjecent registers and construct the 64bit value. We'd then change the bit and writeq will writel the to registers back.

20:56 <Esmil> One of the two 32bit registers will always be the same as what was read. Writing the same value to the 32bit register should be a noop, so I'm not sure I see how it would matter if we write the unchanged 32bit value before or after the changed 32bit value. I'm missing something