f_ changed the topic of ##raspberrypi-internals to: The inner workings of the Raspberry Pi (Low level VPU/HW) -- for general queries please visit #raspberrypi -- open firmware: https://librerpi.github.io/ -- VC4 VPU Programmers Manual: https://github.com/hermanhermitage/videocoreiv/wiki -- chat logs: https://libera.irclog.whitequark.org/~h~raspberrypi-internals -- bridged to matrix and discord
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<CarlFK> clever: do you have/can make/ some docs on how to hook up a zero to a 'standard pi header' to do jtag
<CarlFK> and I'm guessing hooking the 2 uarts together is a good idea
<clever> CarlFK: these 5 pins need to be connected to the jtag pins on the target, you can freely change them however you like
<clever> the exact order is....
<CarlFK> tcl - tickle. I'v heard of that. what is it?
<clever> the pins are tck, tms, tdi, and tdo
<clever> sysfsgpio_jtag_nums 11 25 10 9
<clever> so this means tck=11, tms=25, tdi=10, tdo=9
<clever> sysfsgpio_trst_num 7
<clever> and trst=7
<clever> those are the numbers on the host side, where you run openocd
<clever> https://elinux.org/RPi_BCM2835_GPIOs the ALT5 column, tells you the numbers on the target side
<clever> so 11 on the host, goes to tck, which is 13 or 25 on the target (depends on the mode setup)
<clever> CarlFK: this is what put the pins into alt5 mode, it also says what they are
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<clever> CarlFK: https://www.fpga4fun.com/JTAG.html and this explains how jtag works
<clever> ah but tcl, thats a scripting language, openocd uses tcl files to configure itself
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<CarlFK> openocd... years ago I was trying to get a PR in that got blocked by "use a scope and submit some ...." which is just outside what I was willing to do
<clever> ive also found it a pain to setup openocb every time i need to debug something
<CarlFK> it was someone else's patch, that was causing me a headache ... yeah...
<clever> https://github.com/cleverca22/wifi-jtag i started a new project to simplify things
<CarlFK> "use this openocd fork until this 2+ year old patch..."
<clever> basically, rig a pico-w into the uart and jtag pins of a pi, and then connect to it over the wifi
<clever> currently, it only does uart
<clever> ive done it with a zero before, but it was running from a r/w SD card, and i didnt feel comfortable just yanking power like i would with a pico-w
<clever> but for this, you shouldnt need any patch
<CarlFK> thats refreshing
<clever> although, the openocd in the package manager is many years out of date, and i think everybody recommends you just use openocd master
<CarlFK> https://github.com/bunnie/openocd-netv2mvp you know / heard of bunnie?
<clever> yep, ive read his blog often in the past
<clever> and ive gotten weird looks when telling somebody to go to the bunny blog :P
<CarlFK> lol
<CarlFK> I have a few netv2 boards. somewhere in that universe is the "use this fork..." where I tried to get the patch upstreamed
<CarlFK> I'm curious what ever happened.
<CarlFK> msg xobs "no such nick" huh. thats surprising
<CarlFK> clever: fpga4fun is great.
<clever> yep, they explain a lot of concepts clearly, even if your not planning to use an fpga
<clever> i2c, uart, spi, ethernet, jtag
<CarlFK> https://pinout.xyz/pinout/jtag ... do I have this right: "two separate JTAG interfaces available on the Pi" means there are 2 places the pi can be hooked into to control things...
<clever> CarlFK: its a bit more complex, TDO can be on gpio 5 or gpio 24
<CarlFK> but the pi does not have dedicated jtag pins for controlling, just gpio and software to do the bit banging
<clever> TDI can be on 26 or 4
<clever> and you can make a different choice on each
<clever> there are 2 jtag ports, but not in the way you asked
<clever> the main jtag port, is an unpopulated SMD socket on the bottom, and it can only debug the VPU, and nobody in the public knows how to drive it
<clever> the arm jtag port is behind the gpio altfunc array, so you must set those gpio pins into jtag mode to access the arm jtag port
<clever> CarlFK: you can see from this code, that i picked some high pins (22/26) for some, and low pins (5) for others
<clever> https://elinux.org/RPi_BCM2835_GPIOs and this table makes it far easier to see the layout of the pins
<CarlFK> why the high/low choices?
<clever> entirely random
<clever> i just randomly picked pins as i was setting it up the first time
<CarlFK> got it. so if some other project (https://github.com/mithro/MoBoControl/wiki ) needs a jtag controller (is that the right word?) it doesn't matter which gpio pins are used
<clever> yeah
<clever> on the host side, you can pick any pins you want, as long as you list them correctly in openocd's config
<clever> on the target side, you need to use the pins that are set to the right altmode, as listed in arm.c
<CarlFK> if I made a board that was basically 2 40 pin headers with traces routing gpio to jtag - and adding buttons / leds are about free, what would be some handy buttons / leds?
<clever> i cant see much use in buttons/led's for basic debug, but it cant really hurt to put an led on every gpio?
<clever> having the reset pin wired to a gpio would be handy
<clever> thats part of where my wifi-jtag project comes in
<clever> let me get a photo of it
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<clever> CarlFK: does that image load for you?
<CarlFK> yes
<CarlFK> I think I am trying to make a board version of that
<clever> thats a pico-w and an rpi3, with the gnd, 5v, uart, and reset pins wired together
<clever> gpio 0/1 of the pico go to the uart
<clever> gpio2 of the pico goes to the rpi3 reset pin
<clever> [nix-shell:~/apps/rpi/lk-overlay]$ make PROJECT=rpi3-bootcode -j32 && scp build-rpi3-bootcode/lk.bin root@router:/tftproot/open-firmware/bootcode.bin && nc 10.0.0.105 1234
<clever> this will compile little-kernel, upload it to my tftp server, then connect to the pico-w over wifi
<clever> when i connect, the pico will let reset go high, and the rpi3 begins running the code
<clever> and i can ctrl+c to disconnect, the pico-w will then haul reset low, putting a halt to everything
<clever> the unfinished part, is adding jtag into that mix
<clever> so i can debug remotely
<clever> and yeah, then i could add a PCB to make it far simpler to connect
<CarlFK> do you kicad?
<clever> last time i tried kicad, the grid snaping drove me insane, lol
<CarlFK> I have 2 friends that get boards made every month or so. I can get them to add to their order for a few $ and share the $20 shipping
<CarlFK> do any of the links above give me the connections you have in that pic?
<clever> nope, thats something entirely new, and lacks jtag currently
<clever> need to finish adding jtag to it, and then write up some proper docs
<CarlFK> is "net list" what I am looking for?
<clever> not sure? where are you looking? what are you trying to find?
<CarlFK> the info I need to bang into kicad to make a board that does what you are doing
<CarlFK> which I will take a shot at in about 24 hours
<clever> ah
<clever> first, you would want to slap a pair of 40-pin headers onto the schematic
<clever> then figure out which physical pin is gpio 22, and label that as TRST
<clever> repeat for every pin in this list
<clever> 2024-10-13 16:19:50 < clever> so this means tck=11, tms=25, tdi=10, tdo=9
<clever> 2024-10-13 16:19:56 < clever> and trst=7
<clever> then on the host side, label the pins like this
<clever> then connect each pin, to the matching name on the other side, and gnd too
<clever> and done?
<CarlFK> sounds like it
<clever> then just make sure the 2 connectors on the pcb dont collide when you have 2 pins
<clever> 2 pie's
<CarlFK> collide?
<clever> physically
<clever> if you have 2 connectors on a board, and shove a pi into one, does the other pi fit?
<CarlFK> ah, the whole board.
<clever> yep
<clever> CarlFK: yep, but the host side is completely flexible, you can use the config to make it whatever you want
<CarlFK> oh hey, this thing can control power to the pi. and have a power light. and a momentary "turn it off" button
<CarlFK> what pico pins are you using?
<clever> havent decided on those yet
<clever> for the jtag side
<CarlFK> make something up :p
<clever> i expect that i'll find a pre-made jtag PIO code later
<clever> and i'll need to use pins in the same order as that
<CarlFK> hows that?
<CarlFK> pretty pictures even
<clever> oh, that sounds perfect
<clever> thats basically my entire project goal, lol
<clever> just need to change it from targeting xilinx to rpi
<CarlFK> look at step 8
<clever> CarlFK: already in the notes i left myself: https://github.com/librerpi/rpi-open-firmware/blob/master/docs/arm-jtag.txt#L3
<CarlFK> on the pi 1234 target header - there is alt1/2 - does it make sense to have 2 40 pin headers, one for each?
<clever> CarlFK: i would just pick one, and make sure the pi is configured to match
<CarlFK> er, alt4/5 - looks like 5 has RTCK so that's better?
<clever> CarlFK: you dont have to use the same grouping or mode for all pins
<clever> so you could get TDI from 4, and TDO from 24, then TMS from 12, and TCM from 25
<clever> you can just pick whatever pin fits your pcb routing best
<CarlFK> gah. choices :p
<clever> and on the host side (if its an rpi), you have nearly infinite choices
<clever> any pin can be used
<clever> CarlFK: oh, another idea i had, there is a standard pinout for jtag (i forget what though), creating a board, that adapts the 40pin header to the standard pinout, would then let you use any jtag programmer
<clever> and if you configure openocd to use the same pins, then you can use that same board for both host and target
<clever> this has a 10 pin layout for jtag