whitequark changed the topic of #yosys to: Yosys Open SYnthesis Suite: https://github.com/YosysHQ/yosys/ | Channel logs: https://libera.irclog.whitequark.org/yosys/ | Bridged to #yosys:matrix.org
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<bjorkint0sh> how is FPGA hardware off topic, Adrien[m]?
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<Adrien[m]> If we succeed in having these designs synthesized, placed and routed with only FOSS tools, then it is rather well in yosys topic indeed :D
<Adrien[m]> I would so much appreciate a demonstration PCIe design with only FOSS tools, for board ZC706, VC709, or VCU128
<Adrien[m]> Certainly some time could be dedicated to make this happen.
<Adrien[m]> Funding available for dev/research engineer on an FPGA project.
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<bjorkint0sh> Adrien[m]: who's splurging?
<Adrien[m]> French national research agency.
<bjorkint0sh> open only to locals, isn't it?
<Adrien[m]> Probably some priority France/Europe/World applies to sort applications.
<Adrien[m]> I would like to say open to the world, but no doubt defense reasons makes it closed or extra difficult in conditions known only to govt
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<juri_> Adrien[m]: EU based, but let me get my legs under me. still reading ZipCPU's blog. ;)
<ZipCPU> ;)
<juri_> ZipCPU: hush you. :P
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