ChanServ changed the topic of #yosys to: Yosys Open SYnthesis Suite: https://github.com/YosysHQ/yosys/ | Channel logs: https://libera.irclog.whitequark.org/yosys/
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* Sarayan waves
<Sarayan> I have a module that I put in techlibs/intel_alm/cyclonev/cells_sim.v, called cyclonev_hps_interface_mpu_general_purpose, that is a dual latch with the hps. IOW, it has intrinsic side effects. How can I tell yosys not to remove it when it is instanciated, even if the top module has no external pins?
<Sarayan> (because the top module only plays wiht the signals to/from the gp module)
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<gatecat> Sarayan: the `(* keep *)` attribute is probably what you want
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<Sarayan> Number of cells: 1
<Sarayan> cyclonev_hps_interface_mpu_general_purpose 1
<Sarayan> yay
<Sarayan> now to make nextpnr accept it
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