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<marex>
=> sf probe ; sf update 0x50000000 0 0x160000
<marex>
SF: Detected s25fs512s with page size 256 Bytes, erase size 256 KiB, total 64 MiB
<marex>
device 0 offset 0x0, size 0x160000
<marex>
hmmm ... this is new
<marex>
SPI flash failed in read step
<quinq>
Bad timing parameters?
<marex>
OK ... so SPI NOR is completely broken since 2024.10 , so is ethernet , so is u-boot.itb generation
<Sout_>
ah a zynq? i reconginze that flash
<marex>
no and no
<marex>
hm ... so it seems reverting Xilinx patches to support parallel and stacked memories and other such obscure goop which was rejected year after year now fixes the problem
<quinq>
Oh, stacked memories, we do have some problem with those
<marex>
I do not use a xilinx platform and I do not use any such thing
<cambrian_invader>
why did stacked memories get applied anyway
<Sout_>
at work we use dual stacked. ironically the version of u-boot worked. but i had to fixed a bug in the kernel
<marex>
cambrian_invader: I do not know ...
<cambrian_invader>
you can just specify the memories on two chip selects
<marex>
cambrian_invader: looking at the patches, they should not be applied
<cambrian_invader>
and is it even in linux?
<cambrian_invader>
iirc it keeps getting rejected from linux as well
<Sout_>
no idea if it made it linux offical. but it's in there version of linux
<cambrian_invader>
I have an incomplete patch to make "stacked" memories work in the linux driver with the standard bindings, but I haven't had the time to finish it
<cambrian_invader>
idk about the parallel stuff
* cambrian_invader
should really have reviewed that stuff before it got applied
<marex>
cambrian_invader: I will be sending reverts ... you wanna be on CC ?
<cambrian_invader>
sure
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<cambrian_invader>
I get CC'd on everything anyway...
<marex>
cambrian_invader: heh
<cambrian_invader>
one too many commits with treewide in the shortlog
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<marex>
cambrian_invader: grumb, it is even difficult to revert, since it hacks around a lot of various bits of the codebase