Tartarus changed the topic of #u-boot to: SOURCE MOVED TO https://source.denx.de/u-boot/u-boot.git / U-Boot v2024.04, v2024.07-rc1 are OUT / Merge Window is CLOSED, next branch is CLOSED / Release v2024.07 is scheduled for 01 July 2024 / Channel archives at https://libera.irclog.whitequark.org/u-boot
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<yann-kaelig> Hello
<cheetahpixie> ello
<yann-kaelig> marex: Hello. scsi scan and scsi reset with printf https://dpaste.com/FU755X6FS https://dpaste.com/BB57HM7SZ boot > scsi scan / scsi reset > failed > unplug the ssd > reset > plugin the ssd > scsi scan / scsi reset > success
<yann-kaelig> not sure if can help
<yann-kaelig> Enter start port: 0␍␊ Port 0 status: 0␍␊ No Link on this port!␍␊Can not start port 0␍␊ VS Enter start port: 0␍␊
<yann-kaelig> Port 0 status: 123␍␊cmd_slot = b9f91800␍␊cmd_tbl_dma = b9f91a00␍␊sunxi_dma_init[147]␍␊Exit start port 0␍␊wait_spinup[462]␍␊
<marex> yann-kaelig: clearly you now have a test case which you can easily reproduce and analyze, that's good
<marex> yann-kaelig: you can try dumping registers of all the IPs involved in SATA after cold boot (fail case) and after reset (pass case) and compare them
<marex> use 'md address length' to dump registers
<marex> you likely want to check the clock controller and sata controller first, those are prime suspects
<marex> pinmux controller is probably next in line
<yann-kaelig> marex: I was unable to find where the values you gave me the first time came from > md 0x01c20000 0x100 and are there others ?
<marex> that's the base address of the clock controller, see the SoC DT
<marex> or the soc datasheet
<yann-kaelig> ok, I see. Waou it's beyond my skill. I will see if I can do something. Also last thing I was unable to understand how I was supposed to use scsi_scan() with drivers/scsi/scsi.c. What I'm supposed to get with that.
<yann-kaelig> What the point of adding this function into the scsi.c file if I understand right
<yann-kaelig> There is one bug report which has a similarity with my issue is this one https://lists.denx.de/pipermail/u-boot/2019-May/370567.html
<marex> yann-kaelig: its literally a matter of running the '=> md <address> <length>' after cold boot and after warm reset and see if any bit(s) differ
<marex> if so, try 'mw <address> <value>' to set that bit after cold boot, then run the same failing command and see if it now passes
<yann-kaelig> ok so I have to find the sata controller address and value which should be available on the datasheet
<yann-kaelig> I suppose that it's not easy like that and I will have to convert the value ^^
<yann-kaelig> I must say that this was the first and last time that I bought ARM board. A good experience :D, my next board will be AMD Ryzen embedded. :)
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<yann-kaelig> Thanks marex. CU next time :)
<marex> yann-kaelig: yes, the SATA controller address is also in DT
<marex> arch/arm/boot/dts/allwinner/sun7i-a20.dtsi: ahci: sata@1c18000 {
<marex> arch/arm/boot/dts/allwinner/sun7i-a20.dtsi: ccu: clock@1c20000 {
<marex> it is easy to find
<yann-kaelig> Nice, thx
<marex> it is a cheap board from cheap vendor operated in non-standard configuration , some effort is needed to get it operational
<yann-kaelig> yea, I understand, that was my first contact with ARM and I was attracted by the SATA. Other boards, are more appreciated by the community, but it's roo late now for me and now AMD is in the race now as a good competitor.
<yann-kaelig> In my opinion, the production costs of an ARM processor will increase as x86 processors become competitive. Apple will pay very high prices for its processor.
<yann-kaelig> Anyway, have a good day/night.
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