Tartarus changed the topic of #u-boot to: SOURCE MOVED TO https://source.denx.de/u-boot/u-boot.git / U-Boot v2023.07.02, v2023.10-rc2 are OUT / Merge Window is CLOSED, next branch is OPEN / Release v2023.10 is scheduled for 02 October 2023 / Channel archives at https://libera.irclog.whitequark.org/u-boot
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<Clamor> marex: https://paste.debian.net/1288999/ after Core:.... call max77663 sd driver probe was dropped if you look into tree fragment
<Clamor> sd regulator has always-on property, while ldo does not
<marex> Clamor: always-on shouldn't matter
<marex> Clamor: at least to DM
<Clamor> Always on prop is why those regulator patches exist in the first place
<Clamor> All always on regulators are marked to be probed after bind
<marex> that does make sense
<marex> Clamor: git grep DM_FLAG_ACTIVATED
<marex> Clamor: check the sites which clear manipulate with this flag
<marex> see where the flag is cleared (dev_bic_flags() call)
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<Clamor> Will do
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<Clamor> marex: I have an interesting result. I have disabled always-on on sd regulator and now i2c > pmic > regulator chain is probed after `Loading Environment from MMC...` without errors.
<Clamor> Maybe at this point the sd regulator lost its flag activated but its parents did not though they were corrupted. Idk
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<marex> Clamor: if you were to add prints around the flag manipulation, you would know
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<Clamor> marex: sd regulator driver fails due to tegra xfer failure, this is why it gets unprobed. It seems that tegra i2c lacks smth on early stages which is present in later stages
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<marex> Clamor: well, progress at least then
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<marex> Clamor: clock or pinmux most likely
<Clamor> The clock is set super early, but pinmux. Pinmux is different story
<Clamor> Lets check when ;)
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<Clamor> marex: it seems that pinmux is set even before tegra i2c bind, same as clocks since tegra is highly sensitive to clock stuff, if clocks are not set correct everything just hangs.
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<silurian_invader> marex: thanks for 41a1285c1c3 ("mmc: Fix MMC_CMD_STOP_TRANSMISSION response type and add comment"); ran into it today :)
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<marex> silurian_invader: :)
<silurian_invader> I can't believe that was in the tree for so long, but enough eyeballs etc. etc.
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<marex> silurian_invader: thank renesas really, they found it during their testing, I only tweaked their fix and made it generic
<marex> silurian_invader: and yeah, I am really surprised what kind of gems are still in the codebase, oh well
<silurian_invader> tbh I thought it was a bug in the chip
<silurian_invader> but happy to be wrong
<marex> silurian_invader: I was surprised to find a quirk table for SD and eMMC cards in Linux, so, I understand your suspicion
<marex> that I did not expect to see
<silurian_invader> all hardware has bugs, it's just a matter of time :)
<marex> so true
<silurian_invader> hm, actually, I am seeing this on an SD card...
<marex> silurian_invader: I kinda want to ask which type of SD card, but uh ... I am so deep in another pile of goo that I know I shouldn't
* silurian_invader grabs another sd card
<marex> silurian_invader: does the SD spec part referenced in that commit (or comment above the code iirc) help in some way ?
<silurian_invader> no, not really
<silurian_invader> it just says it's supposed to be an R1b
<marex> silurian_invader: which card is it
<marex> ?
<marex> (model)
<silurian_invader> marex: https://paste.debian.net/1289060/
<marex> silurian_invader: that tells me much, yeah ... what's written on the card ?
<silurian_invader> first one is a "Kingston canvas select plus"
<silurian_invader> second is a "kingston sdc 10/16gb"
<marex> oh
<marex> Select Plus, hum
<marex> c467c8f081859 ("mmc: Add MMC_QUIRK_BROKEN_SD_CACHE for Kingston Canvas Go Plus from 11/2019")
<marex> reminded me of that linux commit
<marex> but I think Select Plus is quite different internally
<silurian_invader> but tbh, I don't think the card should ever be busy after a read
<silurian_invader> e.g. figure 4-30 in the SD spec doesn't show any busy signal, but fig 4-32 to 4-36 do
<marex> silurian_invader: maybe the card can still do some internal NAND management stuff ?
<silurian_invader> when reading?
<silurian_invader> I think this is just the SD spec not specifying enough
<silurian_invader> let me find a card from another brand to test...
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<marex> silurian_invader: consider you may come across data which indicate ECC error, so they need to be moved and written back somewhere else
<silurian_invader> same thing on a "sandisk 4gb" card
<marex> silurian_invader: so MLC NAND card can be doing that
<marex> huh
<silurian_invader> now the problem in my case is CMD12 timing out when "transfer complete" isn't asserted
<silurian_invader> Since there's no data, I think this calls under case (c): "In the case of a command pairing with response-with-busy This bit is set when busy is de-asserted. Refer to DAT Line Active and Command Inhibit (DAT) in the Present State register."
<silurian_invader> so I suspect that it's waiting for an edge
<silurian_invader> but the level is already deasserted...
<silurian_invader> and of course, DAT_ACTIVE is low in present state
<marex> DAT_ACTIVE is some bit or is that the data0 line ?
<marex> if the later, low means driven
<silurian_invader> "This bit provides the status of the data line. 0x0: Data line is free 0x1: Data line is in use"
<silurian_invader> this is all from the SDHCI spec
<marex> ah
<silurian_invader> so I guess the question is, is this a bug in my SDHCI controller (and e.g. the fix is to inspect DAT_ACTIVE when polling for completion), or should we just expect an R1 response for all reads
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<silurian_invader> ok, it's the controller
<silurian_invader> as it doesn't seem to like writes either
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<silurian_invader> time to rework SDHCI_QUIRK_BROKEN_R1B I guess
<marex> silurian_invader: TG for one thing which I didnt break recently
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