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azonenberg>
Anybody have experience using the Xilinx 7 series OSERDESE2 in width expansion mode (cascading master and slave sides) with 10 bit width?
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azonenberg>
UG475 says you need to feed the high two data bits into D3/D4 (per figure 3-15)
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azonenberg>
after several hours of tearing my hair out I appear to be getting good results when I feed to D7/D8
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lain>
that would be a fun typo >.>
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azonenberg>
lain: thats the thing
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azonenberg>
i dont know if it's a typo. i've found other code online using 3/4
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azonenberg>
which confuses the hell out of me
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azonenberg>
for the moment i have my signals fed to 3/4 and 7/8 so one of the two will work
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azonenberg>
but i have no clue why it's doing this