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<bogdan[m]> here's an example of what I mean: https://www.youtube.com/watch?v=4G0SZ4jUVw0 You've got some sort of configuration server running on the drone's controller, and you can "map resources" (configured peripherals) to particular logical functions of "betaflight", and maybe get some feedback if the mapping succeeded or not. What would a Rust HAL need to look like in order to support such applications?
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<almindor[m]> romancardenas: wrt.https://github.com/riscv-rust/e310x/pull/37 do you want to make a release of 0.11 or is there something else you were planning to add beforehand?
<JamesMunns[m]> that seems pretty ub
<JamesMunns[m]> (atomics and volatiles don't exactly play nice)
<JamesMunns[m]> there's some UCG discussion about it, but it's not likely to be a Good Time
<JamesMunns[m]> (and in general, you should never really use volatile for data known by the abstract machine)
<thejpster[m]> I won't name the author, but I believe it happened on your watch ;)
<thejpster[m]> but yes, alarm bells went off when I saw it.
<JamesMunns[m]> pffffft
<JamesMunns[m]> the person that wrote that should have known better :)
<JamesMunns[m]> tell them Ralf is very disappointed :D
<dirbaio[m]> what qemu "machine" should I pick if I want to test some code for cortex-m4?
<dirbaio[m]> and do I even have to pick a "machine"? the code doesn't do any IO at all, it's just compute. can't I just tell qemu "it's just a cortex-m4"?
<thejpster[m]> a cortex-m4 is just a processor. It will sit there and look at you.
<JamesMunns[m]> iirc qemu only supports like two weird ass machine targets for cortex-m
<JamesMunns[m]> the lms thingies
<thejpster[m]> you need SRAM, and probably a UART.
<thejpster[m]> and that means you need a machine to describe those htings
<dirbaio[m]> it's using just semihosting for io
<thejpster[m]> Luminary Micro LM3 is one machine, yes.
<dirbaio[m]> those are cm3 :P
<thejpster[m]> you might be able to replace the CPU
<thejpster[m]> sometimes it complains, sometimes it doesn't. Depends how the machine is defined.
<thejpster[m]> qemu-system-arm -cpu cortex-m4 -machine lm3s6965evb so yeah, that works
<thejpster[m]> Has anyone ever seen an LM3S6595 Evaluation Board? So weird that's the one that went into QEMU.
<thejpster[m]> Along with a Canon Digital Camera I seem to recall. And some other really obscure early Arm devices.
<thejpster[m]> I think Wokwi has a much more 'modern' set of emulated things.
<dirbaio[m]> thejpster[m]: ohhh. thank you! 🙏
<thejpster[m]> s/LM3S6595/LM3S6965/
<danielb[m]> my obvious question after you found a solution is, why don't you use real hardware?
<JamesMunns[m]> thejpster that function is a good candidate for modernizing with the critical section crate, btw.
<thejpster[m]> the whole DK crate needs to be re-written.
<JamesMunns[m]> I think I know what they were going for, but that's... whew
<thejpster[m]> it does seriously sketchy things to promote a Clocks object to have 'static
<JamesMunns[m]> I think there was significant time pressure, yes :D
<thejpster[m]> nothing as permanent as a temporary fix
<JamesMunns[m]> hey if it worked for 4 years, who am I to judge
<JamesMunns[m]> job did
<thejpster[m]> 1.83 also shouts at me about:
<thejpster[m]> `let rtc = core::mem::transmute::<_, RTC0>(())`
<thejpster[m]> which is ... an approach
<thejpster[m]> 🪄 🐰 🎩 🪄
<dirbaio[m]> PAC singletons are overrated
<JamesMunns[m]> What's a couple transmuted zsts between colleagues
<thejpster[m]> we know, dirbaio , you might have mentioned it before :)
<thejpster[m]> I have a whole section in my training on that argument
<dirbaio[m]> o rly 🙈
<bogdan[m]> <thejpster[m]> "I have a whole section in my..." <- Can you share some thoughts on that?
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<rault[m]> hello guys! someone have a good ref of a project that sets a driver that works for i2c + spi with sync & async traits?
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