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<dngrs[m]>
<dirbaio[m]> "but it still feels dirty to have..." <- I don't know if what you're doing would run on macos too, in that case pay attention to the osx handling in defmt. Symbol names in mach-o have different rules
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<Beregond[m]>
newbie question - how to set proper size for buffer? I need to read and deserialize json file, but is there any smart way for to calculate "enough" buffer size on compilation time? Or some "right hand rule" for this?
<JamesMunns[m]>
Little announcement: I'm gunna do a quick preview stream of Poststation (the "reverse proxy for embedded systems" tool I've been working on), talking about what it is and what it does, about 1h15m from now (16:15 CET/Berlin time), feel free to come hang out and ask any questions!
<JamesMunns[m]>
(recording will stay up, in case you can't make it live!)
<diondokter[m]>
Cool! Might put it up on the side
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<RyanSlawson[m]>
Question for anyone here who knows a thing or two about `riscv-rt` - I'm currently using this for a `riscv32imfc-unknown-none-elf` target, but I'm having some issues. First one was that the floating point stuff wasn't... (full message at
<thejpster[m]>
uh, OK. Without any examples that might take a while to reverse engineer. But I'll look into it.
<JamesMunns[m]>
Ah, sorry, it gives you access to the inner item, mutably, inside of a closure
<JamesMunns[m]>
(rather than as a guarded lock)
<thejpster[m]>
Hmm:
<thejpster[m]>
> // NOTE: `raw` must be FIRST
<thejpster[m]>
does drop order apply to the order it's written in the struct, or the order it exists in memory (which might be different due to padding)?
<JamesMunns[m]>
guarded locks are hard to do with critical sections
<JamesMunns[m]>
it's lexical order
<thejpster[m]>
I mean the correct answer is 'use RTIC', but I need a few pages of examples of 'doing it the hard way' before I show them 'use RTIC'
<JamesMunns[m]>
tbf, this crate was my attempt to have "better tools" for people NOT using RTIC or Embassy, I think we should have a better story for things like this, instead of pushing people towards static mut or having to do very verbose "critical section refcell option" dances.
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<danielb[m]>
<JamesMunns[m]> "tbf, this crate was my attempt..." <- but you can still use embassy-sync even if you don't otherwise use embassy 👀
<JamesMunns[m]>
yep! This crate is basically taking the blocking mutex from embassy sync, the plan is/was to then make an intrusive async mutex on top of this
<danielb[m]>
taking, as in it uses the same traits, or do I still have to implement essentially the same thing multiple times as a hal author?
<JamesMunns[m]>
it's not re-exporting it, but you don't need to do it per HAL, the critical section one just uses the critical section crate
<danielb[m]>
but I have more specialized locks that I implement embassy-sync traits for
<JamesMunns[m]>
(it is a copy and paste, I made this when I attempted to make embassy-sync use intrusive collections, with the hope to then "rebase" embassy-sync on top of it)
<danielb[m]>
and apparently I'd have to do the same thing for the scoped mutex trait as well
<JamesMunns[m]>
then yes, for now it is totally separate. The hope was/is to eventually base embassy-sync on top of this, but that hasn't happened yet
<danielb[m]>
until then, let there be fragmentation 🙃
<JamesMunns[m]>
:/
<danielb[m]>
alright thanks, I'm looking forward to what you're cooking actually
<JamesMunns[m]>
you're not wrong, but it's kinda a bummer of a phrasing.
<JamesMunns[m]>
I did have a PR to merge it into embassy-sync, but the larger data structures broke some HALs, which was either a bug in my refactoring, or just actual unsoundness in some of them
<JamesMunns[m]>
but yeah, the hope is to unify. Just... time. You know.
<JamesMunns[m]>
But yeah, this whole effort is to get around the fact that most embassy-sync items are "atomicwaker/waitcell" shaped (e.g. you can never have multiple tasks waiting on the same mutex without waker churn), and not "waitqueue" shaped
<JamesMunns[m]>
Either way, very much so "help wanted" in getting embassy sync switched over, using this crate or not :)
<danielb[m]>
so I see the C031 having too little memory and probably ending up with a stack overflow I guess, but I also see your time driver mention (which may change considerably and we may end up removing alarms, and alarm callbacks) but I'm not seeing any other failures, so what exactly went wrong?
<danielb[m]>
(also, I don't see what grew to eat up extra ram in the C031 case :/ )
<JamesMunns[m]>
I'd have to look at the old ci builds, some of the buffered UART tests were failing semi consistently iirc
<danielb[m]>
I'm fairly sure it's just that one device with the 6K RAM. So probably if we can find a few bytes, this wouldn't be a hard change to make?
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<JamesMunns[m]>
I did shrink the buffers way down to like 16B each, iirc
<JamesMunns[m]>
idk, it was 6mo ago, so I have very little persisting state :)
<danielb[m]>
fair 👍️
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<M9names[m]>
<RyanSlawson[m]> "Question for anyone here who..." <- > <@rslaw:matrix.org> Question for anyone here who knows a thing or two about `riscv-rt` - I'm currently using this for a `riscv32imfc-unknown-none-elf` target, but I'm having some... (full message at
<hjeldin__[m]>
see the pwm being driven, but all my tasks get stuck. any (unsafe) pointers? i'm a total noob, so like stuff to be aware of when dealing with pwm/dma or even the basic gotchas