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<conplan> also, another question: as it is, each of the mutexes for my peripherals is a mutex of a type depending upon the configuration of the pin it holds. is there a way to make this dynamically configureable (change the type of a mutex)?
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<re_irc> < (@adamgreig:matrix.org)> you probably want a dynamically configured pin, so the type is the same, which is often provided by a hal
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<conplan> working?
<re_irc> < (@grantm11235:matrix.org)> conplan: Yup
<re_irc> < (@marmrt:matrix.org)> Is there a preferred way to write a panic handler which logs panic messages over a peripheral (I2C in my case)?
<re_irc> As I understand it I have to do the whole HAL configuration with clocks and gpios in order to get an I2C handle to be able to perform a write operation.
<re_irc> < (@marmrt:matrix.org)> But the MCU registers at that point are unlikely to be at their reset values, so I can't really guarantee that the configuration will work. Right now I'm making sure to use all the same settings as in the main app to reduce the risk of problems but I still have a hard time trusting the code at that point.
<re_irc> < (@grantm11235:matrix.org)> One option is to write the panic data to a persistent chunk of ram and then reset, then print the panic data once your firmware reboots
<re_irc> < (@grantm11235:matrix.org)> https://docs.rs/panic-persist/latest/panic_persist/
<re_irc> < (@marmrt:matrix.org)> Oo, nice. I'll look into that.
<re_irc> < (@grantm11235:matrix.org)> I haven't used it personally, I've just overheard other people talking about it
<re_irc> < (@marmrt:matrix.org)> What I'm doing is writing the panic message to an external FRAM
<re_irc> < (@marmrt:matrix.org)> So I could maybe just as well write to internal RAM, provided I don't lose it when I reset
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<re_irc> < (@diondokter:matrix.org)> Hey all, anybody got an idea how I can do this?
<re_irc> I've got a TCP stream implementation for my async nrf-modem library.
<re_irc> Because it's async, I want to be able to split the stream in a read part and a write part.
<re_irc> Right now I've got it that both halves just borrow the original stream and this works nicely. Now when both halves are dropped the original stream is dropped as well.
<re_irc> < (@dirbaio:matrix.org)> you can do a fixed-size global array of "open socket states" where you track which halves are open
<re_irc> < (@dirbaio:matrix.org)> this puts a fixed upper limit on open sockets but the modem has one already I guess (?)
<re_irc> < (@dirbaio:matrix.org)> when opening a socket, search for a free index. When splitting, each half gets the index. When dropping mark the half as closed and if both halves are closed then close the socket
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<re_irc> < (@diondokter:matrix.org)> There is a maximum yes, so that might be an option.
<re_irc> < (@diondokter:matrix.org)> Thanks!
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<re_irc> < (@nvxx:matrix.org)> is there a less verbose way of doing this:
<re_irc> let cmd = [0xBE, 0xEF, num[0], num[1], num[2], num[3]];
<re_irc> < (@nvxx:matrix.org)> is there a less verbose way of doing this:
<re_irc> let num = someu32.to_le_bits();
<re_irc> let cmd = [0xBE, 0xEF, num[0], num[1], num[2], num[3]];
<re_irc> < (@nvxx:matrix.org)> was hoping something like "[0xBE, 0xEF, num..]" would work, saves having to type out every byte manually (and hope no accidental mistakes are made) - even though the length of num is fixed
<re_irc> < (@chaosprint:matrix.org)> I got this error with nightly "rustc 1.66.0-nightly (a24a020e6 2022-10-18)" but "1.64 stable" works fine... don't know why
<re_irc> < (@chaosprint:matrix.org)> I guess "stm32h7" 0.13 changes this API?
<re_irc> < (@marmrt:matrix.org)> : If you use "heapless::Vec" you can do "cmd.extend_from_slice()"
<re_irc> < (@nvxx:matrix.org)> I'm assuming that would have runtime overhead vs the code I posted? Was hoping for some syntactic sugar to make my life easier
<re_irc> < (@nvxx:matrix.org)> (I'm fairly new to rust so wasn't sure if there was a little trick I was missing)
<re_irc> < (@marmrt:matrix.org)> Not enough runtime overhead to care about
<re_irc> < (@marmrt:matrix.org)> : actually: this is what you want: https://doc.rust-lang.org/beta/core/primitive.slice.html#method.split_at
<re_irc> < (@nvxx:matrix.org)> err split is the opposite of what I'm after, join would seem more like it?
<re_irc> < (@nvxx:matrix.org)> actually this looks like it'd do the trick https://doc.rust-lang.org/beta/core/macro.concat_bytes.html
<re_irc> < (@nvxx:matrix.org)> oh hrm that only works with literals, sad
<re_irc> < (@hartan:matrix.org)> : What about https://doc.rust-lang.org/stable/core/ptr/fn.copy.html?
<re_irc> < (@nvxx:matrix.org)> that might work, but again looks like a runtime thing. will probably just suck it up spelling out the array in full, at least it's only 4 bytes
<re_irc> <Pratush Rai> I have issue in mircobit rust
<re_irc> <Pratush Rai> when I run cargo embed
<re_irc> <Pratush Rai> it always show Error: No supported probe was found
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<re_irc> <Paul Paterson> Hi all! New here but joining to stay on top of news and activity. Also want to say thanks to everyone for hard work! I'm building on top of the rp-hal packages and am very interested in the latest embedded hal alpha releases. Cheers!
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<re_irc> < (@9names:matrix.org)> Pratush Rai: Which os are you running
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<re_irc> < (@grantm11235:matrix.org)> : It;s possible with the unstable "generic_const_exprs" feature https://play.rust-lang.org/?version=nightly&mode=debug&edition=2021&gist=7b96bc231987a0548e48ac19d307cc13
<re_irc> < (@grantm11235:matrix.org)> * It's
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<re_irc> < (@jamesmunns:beeper.com)> tbh, I'd probably do something like:
<re_irc> cmd[0] = 0xBE;
<re_irc> cmd[1..5].copy_from_slice(&num);
<re_irc> let num = sumu32.to_le_bits();
<re_irc> let mut cmd = [0u8; 5];
<re_irc> < (@jamesmunns:beeper.com)> I'd _GUESS_ that the compiler is smart enough to elide the bound checks for indexing
<re_irc> < (@jamesmunns:beeper.com)> because "cmd" has a known size
<re_irc> < (@jamesmunns:beeper.com)> heh:
<re_irc> < (@jamesmunns:beeper.com)> #![no_std]
<re_irc> pub fn demo(num: u32) -> [u8; 5] {
<re_irc> let num = num.to_le_bytes();
<re_irc> let mut cmd = [0u8; 5];
<re_irc> < (@jamesmunns:beeper.com)> example::demo:
<re_irc> movs r1, #190
<re_irc> strb r1, [r0]
<re_irc> str.w r1, [r0, #1]
<re_irc> bx lr
<re_irc> < (@adamgreig:matrix.org)> man, thumbv6 does much worse in this example
<re_irc> < (@jamesmunns:beeper.com)> huh
<re_irc> < (@jamesmunns:beeper.com)> still no bounds checking
<re_irc> < (@jamesmunns:beeper.com)> but weird it uses all byte instrs
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<re_irc> < (@adamgreig:matrix.org)> str.w is v7-only right? and v6 can't do unaligned str either, but v7 can
<re_irc> < (@jamesmunns:beeper.com)> huh. TIL. If it was something hot, it would make sense to make it a "[u8; 8]", and just slice out the last 5 bytes
<re_irc> < (@jamesmunns:beeper.com)> but tbh, its 9 register heavy instructions, with no external mem or flash loads
<re_irc> < (@jamesmunns:beeper.com)> so....
<re_irc> < (@jamesmunns:beeper.com)> honestly it's probably fine, especially if you have any flash wait states lol
<re_irc> < (@adamgreig:matrix.org)> [u8; 8] isn't guaranteed to be aligned either, but i guess you could also align it
<re_irc> < (@jamesmunns:beeper.com)> oh that's true
<re_irc> < (@jamesmunns:beeper.com)> but if it was a stack var, it probably would be?
<re_irc> < (@jamesmunns:beeper.com)> but yeah
<re_irc> < (@adamgreig:matrix.org)> it's so nice that to_le_bytes a) exists b) optimises well, though
<re_irc> < (@adamgreig:matrix.org)> if it's a stack var the stack frame is likely aligned but if you had another u8 before it then it wouldn't be, and you don't necessarily know what's gonna be allocated on the stack frame or in what order?
<re_irc> < (@jamesmunns:beeper.com)> honestly, anything w/ indexing also optimizes really well IFF you are doing it on _arrays_ and not _slices_.
<re_irc> < (@adamgreig:matrix.org)> i used u32::reverse_bits() recently too, another brilliant std lib entry
<re_irc> < (@adamgreig:matrix.org)> and people say rust's std lib doesn't have much in it, have they _looked_ at the integer methods
<re_irc> < (@jamesmunns:beeper.com)> it has all the fun bit twiddling ops
<re_irc> < (@adamgreig:matrix.org)> all the crud you'd have to pull out your vintage "hacker's delight in c" or whatever and implement a table of twiddle factors or whatever
<re_irc> < (@jamesmunns:beeper.com)> but! a lot of them won't trigger unless you use target-cpu=native (on desktop)
<re_irc> < (@jamesmunns:beeper.com)> like, popcnt won't trigger in release mode without the right cpu profile
<re_irc> < (@adamgreig:matrix.org)> need a --really-release lol
<re_irc> < (@nvxx:matrix.org)> : Ooh
<re_irc> < (@nvxx:matrix.org)> That's a lot nicer
<re_irc> < (@jamesmunns:beeper.com)> https://rust.godbolt.org/z/YhMf1fe9z
<re_irc> < (@adamgreig:matrix.org)> beautiful hand written popcnt in x86 asm, why would you trade that for calling whatever deep dark magics are invoked by "popcnt"
<re_irc> < (@jamesmunns:beeper.com)> lol
<re_irc> < (@jamesmunns:beeper.com)> (it's probably the same, just with microcode)
<re_irc> < (@adamgreig:matrix.org)> hmm, i wonder
<re_irc> < (@adamgreig:matrix.org)> seems like it would be pretty cheap to do in hardware
<re_irc> < (@grantm11235:matrix.org)> Here is how my "generic_const_expr" nightmare compares to james' much simpler version: https://godbolt.org/z/To1c1PshW
<re_irc> < (@grantm11235:matrix.org)> the armv6 version is identical, but mine is worse on armv7
<re_irc> < (@adamgreig:matrix.org)> it's got throughput of 1 instruction per cycle on modern x86 processors apparently
<re_irc> < (@adamgreig:matrix.org)> so probably is hardcoded
<re_irc> < (@adamgreig:matrix.org)> : incredible
<re_irc> < (@jamesmunns:beeper.com)> : optimizing compilers are weird.
<re_irc> < (@adamgreig:matrix.org)> just for fun, try opt-level=0 on yours
<re_irc> < (@jamesmunns:beeper.com)> : lol
<re_irc> < (@jamesmunns:beeper.com)> lmao
<re_irc> < (@jamesmunns:beeper.com)> https://godbolt.org/z/bTjYE1vdW
<re_irc> < (@grantm11235:matrix.org)> Mine on the left, james' on the right: https://godbolt.org/z/nb8TxWxGc
<re_irc> < (@jamesmunns:beeper.com)> Mine becomes optimal at opt-level=1 :p
<re_irc> < (@grantm11235:matrix.org)> I wonder how much stack mine uses with opt=0, there must be soo many copied of that "[u8; 6]"
<re_irc> < (@adamgreig:matrix.org)> imagine doing all 2k instructions and ending up with 6 bytes that were practically all lined up before you even started
<re_irc> < (@adamgreig:matrix.org)> poor cpu
<re_irc> < (@jamesmunns:beeper.com)> lolol
<re_irc> < (@jamesmunns:beeper.com)> <core::ops::index_range::IndexRange as core::iter::traits::exact_size::ExactSizeIterator>::len:
<re_irc> sub sp, #8
<re_irc> ldr r0, [r0, #4]
<re_irc> ldr r1, [r0]
<re_irc> < (@jamesmunns:beeper.com)> let's branch to literally the next instruction
<re_irc> < (@jamesmunns:beeper.com)> just for funsies
<re_irc> < (@jamesmunns:beeper.com)> conditionally? nah
<re_irc> < (@jamesmunns:beeper.com)> just straight unconditional branch to literally the next instruction
<re_irc> < (@grantm11235:matrix.org)> Here is an aligned version that is the same on armv6 and armv7 https://godbolt.org/z/67jdnGxv6