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<@dirbaio:matrix.org> for example, if I want to spin on a word, waiting for the other core to change it
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<@adamgreig:matrix.org> If you use the hardware ipc primitives (hsem on stm32, fifos on rp?) you probably don't have to think about it too hard
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<@adamgreig:matrix.org> Otherwise atomics still work
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<@adamgreig:matrix.org> Fences won't prevent races but will ensure you pull fresh data
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<@adamgreig:matrix.org> Volatile should do the same as the fence I guess. If you're just one side reading and one writing I expect any of atomics or fences or volatile should work?
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<@dirbaio:matrix.org> it's a thingy that uses hardware ipc to "signal" the other side that there's new data ready, but the actual data is passed over shared memory...
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<@dirbaio:matrix.org> so I guess
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<@dirbaio:matrix.org> to send: write the data, do a full fence, then do the ipc reg write to send the signal
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<@dirbaio:matrix.org> to receive: when receiving an ipc irq, do a full fence then read the data
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<@dirbaio:matrix.org> does that look decent? 🤔
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<@adamgreig:matrix.org> Assuming no caches are in the way, yea
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<@dirbaio:matrix.org> hahaha.. no idea
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<@adamgreig:matrix.org> Not generally by default
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<@adamgreig:matrix.org> Wonder if you need volatile access or some kind of memory clobber or if the fence is enough to just read the shared memory...
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<@adamgreig:matrix.org> Feels like fence should be ok
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<@dirbaio:matrix.org> all the block diagrams show RAM connected directly to the AHB so I guess
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<@dirbaio:matrix.org> only flash cache
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<@adamgreig:matrix.org> which target?
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<@adamgreig:matrix.org> dcache can be inside the core for cm7
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<@dirbaio:matrix.org> nrf91, cm33
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<@adamgreig:matrix.org> Ah dunno. If you're not turning on dcache it's probably not there and anyway would have already ruined your dma
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<@dirbaio:matrix.org> yeah, DMA only does compiler fences lol
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<@dirbaio:matrix.org> and it seems to work
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<@dirbaio:matrix.org> 🤷
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<@adamgreig:matrix.org> Yea, I feel like this shouldn't be different to reading a DMA buffer
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<@dirbaio:matrix.org> just a mega-cursed DMA :P
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<@jamesmunns:beeper.com> the regular `fence` call should insert a dmb, which would be all you need afaik
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<@thejpster:matrix.org> But of course without reverse engineering libmodem, as that is expressly prohibited by the licence 🤣
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<@dirbaio:matrix.org> I have no idea what you mean at all
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<@ryankurte:matrix.org> released `embedded-hal-compat0.5.0` for `embedded-hal1.0.0-alpha.6` for anyone using it (thanks dirbaio for the assist!)
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<@fragadaleta:matrix.org> anyone played with the nrf52840 dongle and Rust?
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<@fragadaleta:matrix.org> is there a tutorial to get started?
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<@adamgreig:matrix.org> check out https://github.com/nrf-rs and #nrf-rs:matrix.org, there's a bunch of resources for nrf52840 there (though i'm sure people in here have also played with it)
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<@adamgreig:matrix.org> eldruin: in rtcc, i wonder if the Rtcc trait should only do get_datetime and set_datetime, because otherwise it encourages people to read just one field at a time and end up with inconsistent data? like if you call get_minutes, draw the minutes, get_seconds, draw the seconds, you might end up missing a wraparound, but if you can only call get_datetime then draw dt.minutes and dt.seconds you are encouraged...
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... to do the right thing
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<@adamgreig:matrix.org> (and someone who only wants minutes or seconds can still just call get_datetime().minutes ?)
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<@fragadaleta:matrix.org> adamgreig: i am on that page. What i am looking for is a tutorial that guides me with the very basic.
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<@thejpster:matrix.org> I think ferrous do training on that chip