02:27 <re_irc> <@l​achlansneff:m​atrix.org> I joined a club on campus that’s building a liquid rocket engine and I think I’ve convinced them to write the control and sensor software in rust.

02:28 <re_irc> <@l​achlansneff:m​atrix.org> (Embedded rust)

02:31 <re_irc> <@l​achlansneff:m​atrix.org> To be fair there is currently one other person on the avionics team of the club

06:54 <re_irc> <@r​icharddodd:m​atrix.org> I think that's the first time I've used the rocket emoji for that particular reason.

07:27 <re_irc> <@w​00tspeaks:m​atrix.org> has anyone managed to get probe-run working with cortex-m33?

07:27 <re_irc> <@w​00tspeaks:m​atrix.org> I can do `probe-rs-cli info`

07:28 <re_irc> <@9​names:m​atrix.org> which cortex-m33?

07:28 <re_irc> <@w​00tspeaks:m​atrix.org> But I get the following when trying to use probe run to flash: No flash memory contains the entire requested memory range 0x00000000..0x400

07:28 <re_irc> <@w​00tspeaks:m​atrix.org> The one in the lpc55s16-evk

07:29 <re_irc> <@w​00tspeaks:m​atrix.org> LPC55S16 Cortex-M33 processor

07:29 <re_irc> <@w​00tspeaks:m​atrix.org> according to the docs

07:32 <re_irc> <@9​names:m​atrix.org> support for custom sequences only just merged, which is needed for the securezone parts

07:33 <re_irc> <@w​00tspeaks:m​atrix.org> Is this a probe-run thing or a probe-rs thing?

07:33 <re_irc> <@9​names:m​atrix.org> yes

07:34 <re_irc> <@9​names:m​atrix.org> i mean, it's a probe-rs thing

07:34 <re_irc> <@w​00tspeaks:m​atrix.org> I'll assume this means that I need the tip of main?

07:38 <re_irc> <@9​names:m​atrix.org> you'd need to update the dependency in probe-run at least, but there's probably more involved.

07:38 <re_irc> <@9​names:m​atrix.org> maybe you should use something else until there is a new release?

07:40 <re_irc> <@w​00tspeaks:m​atrix.org> Okay. I'll look into alternatives tomorrow. Thx.

13:19 <re_irc> <@b​arafael:m​atrix.org> I think there could be a bitbanged UART implementation that uses interrupts and DMA for almost completely non-blocking operation both RX and TX.

13:23 <re_irc> <@b​arafael:m​atrix.org> The only CPU intervention needed would be interpreting ready frames , generating frames for shifting out via DMA, and interrupt/DMA management

13:23 <re_irc> <@b​arafael:m​atrix.org> Anybody has done this?

13:27 <re_irc> <@h​enrik_alser:m​atrix.org> barafael: Yes, what chip?

13:30 <re_irc> <@b​arafael:m​atrix.org> stm32f4 or f0 ideally, but really I'm interested in any implementation of this

13:30 <re_irc> <@h​enrik_alser:m​atrix.org> https://github.com/kalkyl/f411-rtic/blob/main/src/bin/serial-dma-loopback.rs

13:31 <re_irc> <@h​enrik_alser:m​atrix.org> It also has idle line interrupt if you don’t send full frames

13:31 <re_irc> <@b​arafael:m​atrix.org> Sweet!!!

13:32 <re_irc> <@h​enrik_alser:m​atrix.org> Let me know if there’s stuff that need an explanation in there :)

13:33 <re_irc> <@b​arafael:m​atrix.org> This uses a real USART though - i meant really bitbanging

13:33 <re_irc> <@h​enrik_alser:m​atrix.org> Oh sorry

13:34 <re_irc> <@h​enrik_alser:m​atrix.org> Only heard the dma part of your question :)

13:34 <re_irc> <@b​arafael:m​atrix.org> NP, interesting regardless!

13:35 <re_irc> <@b​arafael:m​atrix.org> I don't even know if this would work. I need a tiny chip that has 6x serial for a cool hex PCB project idea :D

13:37 <re_irc> <@b​arafael:m​atrix.org> For sending, a frame would need to be in RAM and would be shifted out to the BSR/BSRR via timer/DMA. Then there would need to be an end-of-frame interrupt somehow.

13:39 <re_irc> <@b​arafael:m​atrix.org> For receiving, the beginning of a frame would need to trigger a DMA capture to RAM from the IDR. The end-of-frame interrupt would then calculate the received word

13:51 <re_irc> <@h​enrik_alser:m​atrix.org> Hmm, could you abuse the spi peripheral as uart maybe?

13:53 <re_irc> <@h​enrik_alser:m​atrix.org> (For tx at least)

13:58 <re_irc> <@h​enrik_alser:m​atrix.org> And rx in spi slave mode maybe?

14:02 <re_irc> <@n​ewam:m​atrix.org> henrik_alser: It wont get clocked out until the master clocks it, but yeah

14:17 <Lumpio-> Sending is reasonably easy - you could even do 16 bits in one port in parallel with just one DMA

14:18 <Lumpio-> Receiving is more difficult because each channel can send out of sync with each other.

14:19 <re_irc> <@a​damgreig:m​atrix.org> might be able to use timers in DMA mode for RX

14:19 <re_irc> <@a​damgreig:m​atrix.org> often gets you loads more channels

14:20 <re_irc> <@a​damgreig:m​atrix.org> i'd just buy an mcu with 6 usarts though probably :P

14:22 <Lumpio-> I did a thing that receives a train of pulses with DMA and interprets them later

14:50 <re_irc> <@h​enrik_alser:m​atrix.org> Or add an external uart to spi/i2c chip :)

15:25 <re_irc> <@h​enrik_alser:m​atrix.org> Why uart?

16:15 <re_irc> <@b​arafael:m​atrix.org> henrik_alser: 2 Pins and total temporal decoupling is exactly what I need. No space on the board for anything else either

16:15 <re_irc> <@b​arafael:m​atrix.org> I'd be okay with the receive function requiring a number of interrupts, without DMA

16:22 <re_irc> <@h​enrik_alser:m​atrix.org> Got it!

16:24 <re_irc> <@n​ewam:m​atrix.org> Wow I did not realize just how fast [p256-cortex-m4](https://github.com/ycrypto/p256-cortex-m4) really was.

16:24 <re_irc> <@n​ewam:m​atrix.org> p256 verification is about 26ms on my little M4 at 48Mhz, on a rasbperry pi 4 with the full p256 library it takes 28ms 😕 (release mode for both)

16:25 <re_irc> <@t​hejpster:m​atrix.org> Really? The Pi should be 50x to 100x faster in general.

16:26 <re_irc> <@n​ewam:m​atrix.org> Hmm, openssl is advertising 0.0006ms for a pi 4 with p256 🤔

16:26 <re_irc> <@n​ewam:m​atrix.org> Oh boy, here I go benchmarking.

16:26 <re_irc> <@n​ewam:m​atrix.org> thejpster: different code though, hand-optimized [no_std] assembly vs the [std] p256 crate.

16:54 <re_irc> <@n​ewam:m​atrix.org> Oh that's much better, I switched the pi kernel to aarch64 (they're still on armv7 by default 😐️), verification time went from 28ms to 6ms.

20:11 <re_irc> <@t​hejpster:m​atrix.org> Pi userland is armv6 so it will run on the ARM11 of the Pi 1 and Zero.

20:11 <re_irc> <@t​hejpster:m​atrix.org> But yes I can see how more larger registers would help.