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<cousteau>
Hi. Some time ago I discussed support of "aligned register pairs" in RV32 inline assembly in GCC. My understanding was that code like `long long x; asm volatile ("some_instr %0" : "=r" (x));` should ensure that the lower and upper halves of `x` are put in consecutive (aligned) registers, but so far this isn't implemented in GCC yet.
<cousteau>
I remember someone mentioned that "well, Zilsd and Zdinx will use aligned register pairs, so let's see how those evolve"
<jrtc27>
well it's not a single register is it, so r sounds wrong
<jrtc27>
LLVM has since implemented an R constraint for register pairs
<cousteau>
jrtc27: yeah, I thought that maybe "R" or "d" or the like would make more sense, but someone here (or was it in #gcc?) suggested that the idea would be to just use "r", and have the compiler realize that the variable you're passing is 64 bits
<jrtc27>
so, yeah, give it a bit for godbolt.org to catch up :)
<cousteau>
Wait, godbolt doesn't use something that has been added 3 whole hours ago?!
<cousteau>
Useless platform! Unacceptable!
<cousteau>
...seriously though, was that really added to gcc 3 hours ago?
<ch>
you should ask for your money back :D
<cousteau>
"Additionally, some new standard extensions (not yet upstream), such as `Zilsd` and `Zclsd`, ..." -- I'll have you know, Zilsd 1.0rc1 was released last month :D and it's already rc3 so it's almost there
<cousteau>
Anywah, thanks a lot :) You answered all my questions I could've had
<cousteau>
namely "yes, it's just been added to both clang and gcc" and "no, it's not "r" but "R""
<cousteau>
(which actually made more sense to me than repurposing "r" for everything)
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<cousteau>
Now all I have to do is wait for the next release of gcc to come out and I guess that'll include the feature
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