sorear changed the topic of #riscv to: RISC-V instruction set architecture | https://riscv.org | Logs: https://libera.irclog.whitequark.org/riscv | Matrix: #riscv:catircservices.org
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<remexre> anyone familiar with relocate_enable_mmu in linux's arch/riscv/kernel/head.S ? my implementation (which is in-order and doesn't have a TLB at the moment) traps on the instruction after csrw CSR_SATP, a0 -- I'm not sure if this is my bug or if the code is just broken?
<remexre> the trampoline page directory doesn't seem to identity-map the kernel
<remexre> ugh, ignore me, not enough coffee...
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