sorear changed the topic of #riscv to: RISC-V instruction set architecture | https://riscv.org | Logs: https://libera.irclog.whitequark.org/riscv | Matrix: #riscv:catircservices.org
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<JohnHenry> If you want to read about where svnapot came from you can check out this PhD thesis: https://hps.ece.utexas.edu/pub/TR-HPS-2019-001.pdf
<JohnHenry> He talks about the bit arrangement and why it is that way, etc
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<toothe> hi all! I want to get started with risc-v on a qemu emulator. Anyone have any instructions on getting linux or bsd running on risc-v?
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