whitequark[cis] changed the topic of #prjunnamed to: FPGA toolchain project · rule #0 of prjunnamed: no one should ever burn out building software · https://prjunnamed.org · https://github.com/prjunnamed/prjunnamed · logs: https://libera.irclog.whitequark.org/prjunnamed
<mei[m]> <whitequark[cis]> "in principle, I think I prefer..." <- i am in favor of this option
<Wanda[cis]> yeah same
<Wanda[cis]> oh, a nice consequence of the W/E/S/N naming change
<Wanda[cis]> when discussing cascaded RAMs (of which larger LUTRAMs are a subgender of), you can naturally refer to "lower" and "upper" parts as "having higher/lower address"
<Wanda[cis]> which, for Xilinx LUT RAMs, just so happen to be "lower is north"
<mei[m]> is this not a prjcombine thing?
<Wanda[cis]> hm?
<Wanda[cis]> oh
<Wanda[cis]> yes
<Wanda[cis]> sorry wrong channel
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<galibert[m]> oh cool, rust is updated on arch already
<galibert[m]> all tests pass, as expected