ChanServ changed the topic of #prjunnamed to: FPGA toolchain project · rule #0 of prjunnamed: no one should ever burn out building software · https://github.com/prjunnamed/prjunnamed · logs: https://libera.irclog.whitequark.org/prjunnamed
<_whitenotifier-4> [prjunnamed] whitequark edited pull request #11: [RFC] netlist: accept and print fancier value slices and repetitions. - https://github.com/prjunnamed/prjunnamed/pull/11
<_whitenotifier-4> [prjunnamed] wanda-phi synchronize pull request #11: [RFC] netlist: accept and print fancier value slices and repetitions. - https://github.com/prjunnamed/prjunnamed/pull/11
<_whitenotifier-4> [prjunnamed] wanda-phi closed pull request #11: [RFC] netlist: accept and print fancier value slices and repetitions. - https://github.com/prjunnamed/prjunnamed/pull/11
<_whitenotifier-4> [prjunnamed/prjunnamed] wanda-phi pushed 1 commit to main [+0/-0/±4] https://github.com/prjunnamed/prjunnamed/compare/e120a608a29a...81275e374747
<_whitenotifier-4> [prjunnamed/prjunnamed] wanda-phi 81275e3 - netlist: accept and print fancier value slices and repetitions.
<_whitenotifier-4> [prjunnamed] wanda-phi deleted branch netlist-value-print - https://github.com/prjunnamed/prjunnamed
<_whitenotifier-4> [prjunnamed] wanda-phi synchronize pull request #12: siliconblue: Implement memory lowering. - https://github.com/prjunnamed/prjunnamed/pull/12
<_whitenotifier-4> [prjunnamed/amaranth] whitequark pushed 1 commit to main [+0/-0/±2] https://github.com/prjunnamed/amaranth/compare/1009ddb13897...179e4dedd9ae
<_whitenotifier-4> [prjunnamed/amaranth] whitequark 179e4de - vendor._siliconblue: add prjunnamed toolchain support.
<_whitenotifier-4> [prjunnamed/prjunnamed] wanda-phi pushed 1 commit to main [+0/-0/±1] https://github.com/prjunnamed/prjunnamed/compare/81275e374747...2425fb46c9c8
<_whitenotifier-4> [prjunnamed/prjunnamed] wanda-phi 2425fb4 - netlist: recognize #0 and #1 as valid bool values.
<_whitenotifier-4> [prjunnamed] wanda-phi synchronize pull request #12: siliconblue: Implement memory lowering. - https://github.com/prjunnamed/prjunnamed/pull/12
<Wanda[cis]> ha
<Wanda[cis]> this thing can synthesize working unmodified Glasgow uart applet now
<whitequark[cis]> not just UART, it can utilize all of the RAM and i verified it works via the benchmark applet
<whitequark[cis]> passes timing too (60 MHz vs 100 MHz on Yosys, and with almost twice the amount of LUTs, but it does)
<mupuf> whitequark[cis]: Already???? Damn, that is impressive!
<Wanda[cis]> well I did write the memory lowering pass today
<Wanda[cis]> it was the last major missing part
<whitequark[cis]> FPGA toolchains are really not as complicated as one might think
<Wanda[cis]> now starts the long fun part of optimizing this shit
<Wanda[cis]> (okay I lied a bit; for iCE40 we still want to have DSP and SPRAM lowering)
<mei[m]> is the plan to keep using nextpnr for now?
<Wanda[cis]> (but even that only matters for iCE40 Ultra)
<Wanda[cis]> mei: so the current plan is
<Wanda[cis]> well. as you know, I start the trip back home in 20h or so, then lock myself in our cave until we have prjcombine-siliconblue in the Proper shape for starting work on P&R
<Wanda[cis]> I expect it to take around a month
<Wanda[cis]> Cat has its own things to do in the meantime
<Wanda[cis]> then we reconvene to design the P&R part
<mei[m]> Wanda[cis]: thunderscope?
<Wanda[cis]> (this involves finishing actual prjcombine-siliconblue, but also a bunch of general work to clean up prjcombine interface and make it actually usable from unnamed)
<whitequark[cis]> mei[m]: yea
<mupuf> Wanda[cis]: congrats! Are you happier with this implementation than with the one you did for yosys?
<Wanda[cis]> yes
<Wanda[cis]> it's structured significantly better (I talked about it at length previously), it's not going to involve a load-bearing SAT solver, and it's actually testable
<mupuf> good to hear :)
<Wanda[cis]> (I'm finishing up writing tests for the core part now)
<mupuf> Please rest before the trip though
<Wanda[cis]> mupuf: haahaha lmao.
<Wanda[cis]> no rest for the wicked.
<Wanda[cis]> well. I do intend to basically sleep all day, at least
<Wanda[cis]> and then catch whatever sleep I can on trains tomorrow
<mupuf> good, please do :)
<_whitenotifier-4> [prjunnamed] whitequark created branch metadata - https://github.com/prjunnamed/prjunnamed
<_whitenotifier-4> [prjunnamed/vscode-syntax] whitequark pushed 1 commit to main [+1/-0/±2] https://github.com/prjunnamed/vscode-syntax/compare/58a7c1f3d9e4...b3a5362c8764
<_whitenotifier-4> [prjunnamed/vscode-syntax] whitequark b3a5362 - Add syntax for metadata.
<_whitenotifier-4> [vscode-syntax] whitequark created tag v0.4.0 - https://github.com/prjunnamed/vscode-syntax
<_whitenotifier-4> [prjunnamed/vscode-syntax] whitequark tagged b3a5362 as v0.4.0 https://github.com/prjunnamed/vscode-syntax/commit/b3a5362c87647316a406d54b06545f010eea5e46
<_whitenotifier-4> [prjunnamed] wanda-phi synchronize pull request #12: siliconblue: Implement memory lowering. - https://github.com/prjunnamed/prjunnamed/pull/12
<_whitenotifier-4> [prjunnamed] wanda-phi synchronize pull request #12: siliconblue: Implement memory lowering. - https://github.com/prjunnamed/prjunnamed/pull/12
<_whitenotifier-4> [prjunnamed] wanda-phi closed pull request #12: siliconblue: Implement memory lowering. - https://github.com/prjunnamed/prjunnamed/pull/12
<_whitenotifier-4> [prjunnamed/prjunnamed] wanda-phi pushed 1 commit to main [+7/-0/±6] https://github.com/prjunnamed/prjunnamed/compare/2425fb46c9c8...dbd7e3dbc363
<_whitenotifier-4> [prjunnamed/prjunnamed] wanda-phi dbd7e3d - siliconblue: Implement memory lowering.
<_whitenotifier-4> [prjunnamed] wanda-phi deleted branch memory - https://github.com/prjunnamed/prjunnamed
<_whitenotifier-4> [prjunnamed] whitequark opened pull request #13: Implement metadata support - https://github.com/prjunnamed/prjunnamed/pull/13
<_whitenotifier-4> [prjunnamed] whitequark synchronize pull request #13: Implement metadata support - https://github.com/prjunnamed/prjunnamed/pull/13
<_whitenotifier-4> [prjunnamed/amaranth] wanda-phi pushed 3 commits to main [+1/-0/±4] https://github.com/prjunnamed/amaranth/compare/179e4dedd9ae...9a2cf71f3f71
<_whitenotifier-4> [prjunnamed/amaranth] wanda-phi 1e97eef - back.unnamed: new backend.
<_whitenotifier-4> [prjunnamed/amaranth] whitequark 2795b79 - cli: `json` and `uir` format support.
<_whitenotifier-4> [prjunnamed/amaranth] whitequark 9a2cf71 - vendor._siliconblue: add prjunnamed toolchain support.
<_whitenotifier-4> [prjunnamed] whitequark synchronize pull request #13: Implement metadata support - https://github.com/prjunnamed/prjunnamed/pull/13
<_whitenotifier-4> [prjunnamed] whitequark synchronize pull request #13: Implement metadata support - https://github.com/prjunnamed/prjunnamed/pull/13
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<_whitenotifier-4> [prjunnamed] whitequark synchronize pull request #13: Implement metadata support - https://github.com/prjunnamed/prjunnamed/pull/13
<_whitenotifier-4> [prjunnamed] whitequark synchronize pull request #13: Implement metadata support - https://github.com/prjunnamed/prjunnamed/pull/13
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<_whitenotifier-4> [prjunnamed/amaranth] wanda-phi pushed 1 commit to main [+0/-0/±1] https://github.com/prjunnamed/amaranth/compare/9a2cf71f3f71...95e965e64b76
<_whitenotifier-4> [prjunnamed/amaranth] wanda-phi 95e965e - back.unnamed: implement metadata.
<_whitenotifier-4> [prjunnamed/vscode-syntax] whitequark pushed 1 commit to main [+0/-0/±2] https://github.com/prjunnamed/vscode-syntax/compare/b3a5362c8764...34cc183f919f
<_whitenotifier-4> [prjunnamed/vscode-syntax] whitequark 34cc183 - Add keyword for metadata attributes.
<_whitenotifier-4> [prjunnamed/vscode-syntax] whitequark tagged 34cc183 as v0.4.1 https://github.com/prjunnamed/vscode-syntax/commit/34cc183f919ff1536c410b7b1c61c5f7494dec78
<_whitenotifier-4> [vscode-syntax] whitequark created tag v0.4.1 - https://github.com/prjunnamed/vscode-syntax
<_whitenotifier-4> [prjunnamed/amaranth] wanda-phi pushed 1 commit to main [+0/-0/±1] https://github.com/prjunnamed/amaranth/compare/95e965e64b76...a19cde66492c
<_whitenotifier-4> [prjunnamed/amaranth] wanda-phi a19cde6 - back.unnamed: implement metadata.
<_whitenotifier-4> [prjunnamed] whitequark synchronize pull request #13: Implement metadata support - https://github.com/prjunnamed/prjunnamed/pull/13
<whitequark[cis]> we have source locations!
<whitequark[cis]> there's two of them on this flop because another flop got merged into it
<_whitenotifier-4> [prjunnamed] whitequark opened issue #14: Implement assert_isomorphic! for `assign` and `match` cells - https://github.com/prjunnamed/prjunnamed/issues/14
<_whitenotifier-4> [prjunnamed] wanda-phi opened issue #15: Implement metadata tracking for SiliconBlue LUT mapping - https://github.com/prjunnamed/prjunnamed/issues/15
<_whitenotifier-4> [prjunnamed] whitequark synchronize pull request #13: Implement metadata support - https://github.com/prjunnamed/prjunnamed/pull/13
<_whitenotifier-4> [prjunnamed] wanda-phi opened issue #16: Convert memory cells to use multiple outputs in text format - https://github.com/prjunnamed/prjunnamed/issues/16
<_whitenotifier-4> [prjunnamed] whitequark synchronize pull request #13: Implement metadata support - https://github.com/prjunnamed/prjunnamed/pull/13
<_whitenotifier-4> [prjunnamed] whitequark closed pull request #13: Implement metadata support - https://github.com/prjunnamed/prjunnamed/pull/13
<_whitenotifier-4> [prjunnamed/prjunnamed] whitequark pushed 1 commit to main [+1/-0/±18] https://github.com/prjunnamed/prjunnamed/compare/dbd7e3dbc363...1e3aeb1a8775
<_whitenotifier-4> [prjunnamed/prjunnamed] whitequark 1e3aeb1 - Implement metadata support.
<_whitenotifier-4> [prjunnamed] whitequark deleted branch metadata - https://github.com/prjunnamed/prjunnamed
<_whitenotifier-4> [prjunnamed] wanda-phi opened issue #17: Implement SiliconBlue Place & Route - https://github.com/prjunnamed/prjunnamed/issues/17
<whitequark[cis]> lmao @ "bad first issue"
<whitequark[cis]> phenomenal, i love it
<Wanda[cis]> the existence of "good first issue" implies etc etc
<_whitenotifier-4> [prjunnamed] whitequark opened issue #18: Implement Verilog backend - https://github.com/prjunnamed/prjunnamed/issues/18
<_whitenotifier-4> [prjunnamed] whitequark reviewed pull request #9 commit - https://github.com/prjunnamed/prjunnamed/pull/9#discussion_r1957898916
<_whitenotifier-4> [prjunnamed] whitequark opened issue #19: Document the Unnamed IR - https://github.com/prjunnamed/prjunnamed/issues/19
<_whitenotifier-4> [prjunnamed] whitequark opened issue #20: Set up a document publishing system - https://github.com/prjunnamed/prjunnamed/issues/20
<whitequark[cis]> ... why are all PACKAGE_PINs connected to the exact same I/O
<_whitenotifier-4> [prjunnamed] whitequark opened issue #21: Finish the IR validator - https://github.com/prjunnamed/prjunnamed/issues/21
<_whitenotifier-4> [prjunnamed/prjunnamed] whitequark pushed 1 commit to main [+0/-0/±2] https://github.com/prjunnamed/prjunnamed/compare/1e3aeb1a8775...e468c2cc9fff
<_whitenotifier-4> [prjunnamed/prjunnamed] whitequark e468c2c - netlist: fix an issue with io numbering.
<galibert[m]> it's optimized
<whitequark[cis]> the error is wrong I think, the problem is that the same IO is connected to more than one PACKAGE_PIN
<_whitenotifier-4> [prjunnamed/prjunnamed] whitequark pushed 3 commits to main [+0/-0/±4] https://github.com/prjunnamed/prjunnamed/compare/e468c2cc9fff...16af88335541
<_whitenotifier-4> [prjunnamed/prjunnamed] whitequark b8aa2ca - yosys_json: use APIT where possible. NFC
<_whitenotifier-4> [prjunnamed/prjunnamed] whitequark eb002e1 - yosys_json: export cell and net attributes from metadata.
<_whitenotifier-4> [prjunnamed/prjunnamed] whitequark 16af883 - netlist: preserve metadata of `debug` cells.
<whitequark[cis]> hell yeah, source locations in nextpnr reports!
<whitequark[cis]> there's an off-by-one obviously
<_whitenotifier-4> [prjunnamed/amaranth] whitequark pushed 1 commit to main [+0/-0/±1] https://github.com/prjunnamed/amaranth/compare/a19cde66492c...2fb04ad75779
<_whitenotifier-4> [prjunnamed/amaranth] whitequark 2fb04ad - back.unnamed: fix off-by-1.
<_whitenotifier-4> [prjunnamed/prjunnamed] whitequark pushed 1 commit to main [+0/-0/±1] https://github.com/prjunnamed/prjunnamed/compare/16af88335541...c7cdf638cdfb
<_whitenotifier-4> [prjunnamed/prjunnamed] whitequark c7cdf63 - netlist: print first non-None metadata item index as `!0`.
<_whitenotifier-4> [prjunnamed/amaranth] whitequark pushed 1 commit to main [+0/-0/±1] https://github.com/prjunnamed/amaranth/compare/2fb04ad75779...ea1dbf48a6f8
<_whitenotifier-4> [prjunnamed/amaranth] whitequark ea1dbf4 - back.unnamed: start metadata from !0.
<whitequark[cis]> now that yosys doesn't pollute nextpnr reports with completely useless pointers into techmap files, i can appreciate how violently useless half of the source locations produced by amaranth are
<_whitenotifier-4> [prjunnamed/prjunnamed] whitequark pushed 1 commit to main [+0/-0/±2] https://github.com/prjunnamed/prjunnamed/compare/c7cdf638cdfb...4269facd244a
<_whitenotifier-4> [prjunnamed/prjunnamed] whitequark 4269fac - netlist: print first non-None metadata item index as `!0`.
<_whitenotifier-4> [prjunnamed/prjunnamed] whitequark pushed 1 commit to main [+0/-0/±1] https://github.com/prjunnamed/prjunnamed/compare/4269facd244a...078dcc215ebd
<_whitenotifier-4> [prjunnamed/prjunnamed] whitequark 078dcc2 - siliconblue: preserve metadata during memory lowering.
<whitequark[cis]> nice, just a single line is enough to cause metadata to appear on both SB_RAM40_4K cell and the SB_DFFs that were used for legalizing it
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<povikMartinPovie> the metadata guard? I want to do something similar in yosys-slang
<whitequark[cis]> yep
<whitequark[cis]> it's a blunt instrument, but... most of the time you actually want a big hammer
<whitequark[cis]> meanwhile the thing that yosys does makes no sense whatsoever
<whitequark[cis]> the NEW_ID
<whitequark[cis]> like yes technically in some cases it may be useful to know that. but i'm not sure if i ever encountered those cases
<whitequark[cis]> can you imagine this, actually useful source locations for every LUT?
<_whitenotifier-4> [prjunnamed/prjunnamed] whitequark pushed 3 commits to main [+0/-0/±13] https://github.com/prjunnamed/prjunnamed/compare/078dcc215ebd...beab92cf7502
<_whitenotifier-4> [prjunnamed/prjunnamed] whitequark e1ec332 - netlist: factor out `MetaItemRef::{from_iter,merge}`.
<_whitenotifier-4> [prjunnamed/prjunnamed] whitequark 603d1c1 - pattern: transfer metadata to cells created within a rule guard expression.
<_whitenotifier-4> [prjunnamed/prjunnamed] whitequark beab92c - siliconblue: transfer metadata to LUTs.
<_whitenotifier-4> [prjunnamed] whitequark closed issue #15: Implement metadata tracking for SiliconBlue LUT mapping - https://github.com/prjunnamed/prjunnamed/issues/15
<whitequark[cis]> i can click around in the timing report and it points me into source code that is at least somewhat relevant to the timing path
<jn_> amazing work
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<_whitenotifier-4> [prjunnamed/prjunnamed] whitequark pushed 3 commits to main [+0/-0/±4] https://github.com/prjunnamed/prjunnamed/compare/beab92cf7502...77e9b8aad4fb
<_whitenotifier-4> [prjunnamed/prjunnamed] whitequark 885bb9a - yosys_json: do not automatically export target cells.
<_whitenotifier-4> [prjunnamed/prjunnamed] whitequark d52c0a7 - netlist: emit source location as URL in Unnamed IR output.
<_whitenotifier-4> [prjunnamed/prjunnamed] whitequark 77e9b8a - siliconblue: remove leftover debug code. NFC
<_whitenotifier-4> [prjunnamed/prjunnamed] whitequark pushed 2 commits to main [+0/-0/±3] https://github.com/prjunnamed/prjunnamed/compare/77e9b8aad4fb...083142a56588
<_whitenotifier-4> [prjunnamed/prjunnamed] whitequark e88d42c - netlist: emit source location as URL in Unnamed IR output.
<_whitenotifier-4> [prjunnamed/prjunnamed] whitequark 083142a - siliconblue: remove leftover debug code. NFC
<_whitenotifier-4> [prjunnamed] whitequark opened issue #22: Pathologically bad decision tree mapping - https://github.com/prjunnamed/prjunnamed/issues/22
<_whitenotifier-4> [prjunnamed] whitequark commented on issue #16: Convert memory cells to use multiple outputs in text format - https://github.com/prjunnamed/prjunnamed/issues/16#issuecomment-2663576418
<whitequark[cis]> oh, no. this is the optimized output
<whitequark[cis]> there's not actually a lot of cells but they are all 69-wide
<_whitenotifier-4> [prjunnamed/amaranth] wanda-phi pushed 1 commit to main [+0/-0/±1] https://github.com/prjunnamed/amaranth/compare/ea1dbf48a6f8...44f7a7597c96
<_whitenotifier-4> [prjunnamed/amaranth] wanda-phi 44f7a75 - back.unnamed: emit idents for memories and instances.
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<_whitenotifier-4> [prjunnamed] wanda-phi opened issue #23: SiliconBlue: implement `SB_MAC16` inference - https://github.com/prjunnamed/prjunnamed/issues/23
<_whitenotifier-4> [prjunnamed] wanda-phi opened issue #24: SiliconBlue: implement `SB_SPRAM256KA` inference - https://github.com/prjunnamed/prjunnamed/issues/24
<_whitenotifier-4> [prjunnamed] wanda-phi opened issue #25: SiliconBlue: implement the full set of target cells - https://github.com/prjunnamed/prjunnamed/issues/25
<_whitenotifier-4> [prjunnamed] wanda-phi opened issue #26: Design and implement enum encoding metadata - https://github.com/prjunnamed/prjunnamed/issues/26
<_whitenotifier-4> [prjunnamed] wanda-phi opened issue #27: Design and implement `ram_type` metadata - https://github.com/prjunnamed/prjunnamed/issues/27
<_whitenotifier-4> [prjunnamed] wanda-phi opened issue #28: Design and implement print and assert cells - https://github.com/prjunnamed/prjunnamed/issues/28
<mei[m]> <_whitenotifier-4> "[prjunnamed/prjunnamed] whitequa..." <- maybe there should be a test for this?
<whitequark[cis]> wanna write it?
<_whitenotifier-4> [prjunnamed/prjunnamed] whitequark pushed 2 commits to main [+0/-0/±2] https://github.com/prjunnamed/prjunnamed/compare/083142a56588...9a82a4018c8a
<_whitenotifier-4> [prjunnamed/prjunnamed] whitequark 27e9942 - decision: work around a bug in union-find-rs.
<_whitenotifier-4> [prjunnamed/prjunnamed] whitequark 9a82a40 - decision: improve debug output. NFC
<mei[m]> <whitequark[cis]> "wanna write it?" <- atm i don't know what the actual issue is that this fixes
<whitequark[cis]> oh. if you add an io, apply, then add another io, the second one will overlap with the first
<whitequark[cis]> (they will both start at 0)
<mei[m]> <_whitenotifier-4> "[prjunnamed/prjunnamed] whitequa..." <- btw, maybe we should have our own unionfind impl? it's not a complicated algorithm, i don't think it makes sense to pull in an unmaintained dependency for this
<whitequark[cis]> wanna write it?
<whitequark[cis]> there's also https://docs.rs/union-find/latest/union_find/ but i don't vibe with how many options it has
<whitequark[cis]> also the traits are really weird and not typesafe at all
<whitequark[cis]> not a huge deal for the intended application but it's why i picked the other impl
<Wanda[cis]> bleh
<Wanda[cis]> why did I write so many memory lowering tests
<Wanda[cis]> now I need to convert them all to the new memory syntax
<mei[m]> there's no problem that cannot be solved with a sufficiently advanced vim macro
<_whitenotifier-4> [prjunnamed] whitequark commented on issue #22: Pathologically bad decision tree mapping - https://github.com/prjunnamed/prjunnamed/issues/22#issuecomment-2663911149
<_whitenotifier-4> [prjunnamed] wanda-phi created branch memory-syntax - https://github.com/prjunnamed/prjunnamed
<_whitenotifier-4> [prjunnamed] wanda-phi opened pull request #29: netlist: convert memory cells to per-port outputs in text format. - https://github.com/prjunnamed/prjunnamed/pull/29
<_whitenotifier-4> [prjunnamed/prjunnamed] whitequark pushed 1 commit to main [+0/-0/±1] https://github.com/prjunnamed/prjunnamed/compare/9a82a4018c8a...2e17da8116b4
<_whitenotifier-4> [prjunnamed/prjunnamed] whitequark 2e17da8 - decision: break assign chains when crossing decision tree boundaries.
<_whitenotifier-4> [prjunnamed] whitequark closed issue #22: Pathologically bad decision tree mapping - https://github.com/prjunnamed/prjunnamed/issues/22
<_whitenotifier-4> [prjunnamed/prjunnamed] whitequark pushed 1 commit to main [+0/-0/±1] https://github.com/prjunnamed/prjunnamed/compare/2e17da8116b4...34530875d271
<_whitenotifier-4> [prjunnamed/prjunnamed] whitequark 3453087 - netlist: remove unused impl. NFC
<_whitenotifier-4> [prjunnamed/amaranth] wanda-phi pushed 1 commit to main [+0/-0/±1] https://github.com/prjunnamed/amaranth/compare/44f7a7597c96...68c5949d33a5
<_whitenotifier-4> [prjunnamed/amaranth] wanda-phi 68c5949 - back.unnamed: implement per-read-port memory outputs.
<_whitenotifier-4> [prjunnamed/prjunnamed] wanda-phi pushed 1 commit to main [+0/-0/±9] https://github.com/prjunnamed/prjunnamed/compare/34530875d271...ba3b72c1b686
<_whitenotifier-4> [prjunnamed/prjunnamed] wanda-phi ba3b72c - netlist: convert memory cells to per-port outputs in text format.
<_whitenotifier-4> [prjunnamed] wanda-phi closed pull request #29: netlist: convert memory cells to per-port outputs in text format. - https://github.com/prjunnamed/prjunnamed/pull/29
<_whitenotifier-4> [prjunnamed] wanda-phi closed issue #16: Convert memory cells to use multiple outputs in text format - https://github.com/prjunnamed/prjunnamed/issues/16
<_whitenotifier-4> [prjunnamed] wanda-phi deleted branch memory-syntax - https://github.com/prjunnamed/prjunnamed
<Wanda[cis]> and thus, we have no more backwards-incompatible IR changes planned
<Wanda[cis]> (at least for now)
<galibert[m]> So only the unplanned ones left
<_whitenotifier-4> [prjunnamed/prjunnamed] meithecatte pushed 1 commit to main [+0/-0/±1] https://github.com/prjunnamed/prjunnamed/compare/ba3b72c1b686...6bd37834e29b
<_whitenotifier-4> [prjunnamed/prjunnamed] meithecatte 6bd3783 - Add some comments to the decision pass. Correct misinformation.
<mei[m]> Catherine: is there a use for `MatchMatrix` always having an empty fallback rule at the end, as inserted here? https://github.com/prjunnamed/prjunnamed/blob/main/generic/src/decision.rs#L365
<mei[m]> MatchMatrix::merge looks like it'd make use of it but this line seems to make it obsolete: https://github.com/prjunnamed/prjunnamed/blob/main/generic/src/decision.rs#L94
<Wanda[cis]> (note: Cat just went upstairs to be horizontal; may not reply for a while)
<Wanda[cis]> well
<Wanda[cis]> the pope has died, and so I shall leave for the train
<galibert[m]> Err, the pope, really, or is that just an expression of?
<galibert[m]> -of
<Wanda[cis]> mei: can you enlighten our friend, I have to go
<mei[m]> sure thing
<mei[m]> galibert: i assume you're not familiar with the Polish tradition of pope slander?
<galibert[m]> I am not
<galibert[m]> Sound like an interesting tradition
<mei[m]> so, John Paul II, the polish pope
<galibert[m]> Yeah
<mei[m]> when he was alive, there was kind of a cult of personality around him
<mei[m]> or, at least, the mainstream media tried to make it so
<galibert[m]> Oh yeah, in France too actually
<mei[m]> when he died, they covered it like poland's own 9/11
<mei[m]> or, idk, queen elizabeth dying
<mei[m]> and they kinda overdid it
<galibert[m]> Oh, that must have been annoying
<mei[m]> spawning an entire genre of memes
<galibert[m]> Fun
<mei[m]> said genre got further amplified when the whole pedophilia in the catholic church debacle happened
<galibert[m]> Heh
<mei[m]> so, you have 21:37, the time of death of the pope, being widely considered a "funny number" in poland, much like 69 or 420 in other parts of the world
<mei[m]> there's also JP2GMD, which is kind of like ACAB in spirit, and stands for "John Paul the 2nd raped young children"
<mei[m]> common pope memes often involve making the face of the pope more yellow
<mei[m]> i am not sure how that particular part happened
<galibert[m]> The 21:37 one is fascinating
<cr1901> Wait, did the Pope actually die and it's not been reported over here (US EST) yet?
<galibert[m]> No
<galibert[m]> Scrollback, you’ll see.
<galibert[m]> mei was explaining the memes, much thanks for that
<cr1901> I'm aware of the Polish memes. Thought it was the meme being used ironically
<cr1901> (as in, Polish meme plus "Oh wait, he actually died")
<Wanda[cis]> it is customary to insult the dead pope every day at 21:37
<galibert[m]> Funny custom
<cr1901> Probably Wanda was the one who told me about the meme in the first place, for all I remember
<Wanda[cis]> (note: it is also illegal to insult the pope in Poland)
<cr1901> And we know you obey laws, no matter how just :)
<cr1901> unjust* even
<galibert[m]> Aren’t you in the uk?
<mei[m]> Wanda[cis]: oh right, a friend of ours got sued for that
<Wanda[cis]> not for long
<mei[m]> any idea how that ended?
<galibert[m]> So you’re allowed to insult Teacher but the buck stops at Diana, I think
<mei[m]> you mean thatcher?
<galibert[m]> Yeah sorry typoed
<Wanda[cis]> mei[m]: not really
<Wanda[cis]> but also she got raided for the crime of embarassing polish government, the pope stuff was just what they could charge her with
<galibert[m]> Ok, just lived something fascinating
<_whitenotifier-4> [prjunnamed/prjunnamed] meithecatte pushed 2 commits to main [+0/-0/±2] https://github.com/prjunnamed/prjunnamed/compare/6bd37834e29b...074aefd31ec3
<galibert[m]> I typed Pope in X as a reply instead of a search term
<_whitenotifier-4> [prjunnamed/prjunnamed] meithecatte 3b5bb97 - MatchMatrix: rename iter_rules -> iter_outputs
<_whitenotifier-4> [prjunnamed/prjunnamed] meithecatte 074aefd - iter_outputs: avoid useless intermediate BTreeSet (NFC)
<galibert[m]> And the reply just got liked by John Ringo, the SF author. WTF?
<galibert[m]> At least that way I could see the post to delete it, but wtf?
<_whitenotifier-4> [prjunnamed/prjunnamed] meithecatte pushed 1 commit to main [+0/-0/±1] https://github.com/prjunnamed/prjunnamed/compare/074aefd31ec3...052b9362683e
<_whitenotifier-4> [prjunnamed/prjunnamed] meithecatte 052b936 - i should probably compile before pushing hahah oops
<Wanda[cis]> mei.
<Wanda[cis]> ... time to enable the merge queue I guess
<Wanda[cis]> okay I guess I'd better not attempt this from a phone
<mei[m]> i'm sorryyyyy, i have adhd, i'll set up a pre-commit hook or something
<Wanda[cis]> just send prs
<mei[m]> what's the semantics for X on input of a match cell?
<Wanda[cis]> we want to set up a merge queue anyway
<Wanda[cis]> so it'll just be the only way to merge stuff
<mei[m]> so what's the procedure for small stuff in that workflow? just open pr and immediately enqueue onto merge queue?
<Wanda[cis]> mei[m]: ummmm. excellent question. idk.
<Wanda[cis]> mei[m]: basically yes
<mei[m]> <mei[m]> "Catherine: is there a use for `..." <- Catherine: to expand on this, it would seem that there is the following invariant in the code:... (full message at <https://catircservices.org/_irc/v1/media/download/Ad9tlQKC_23IWTuJ6zN0V3F3lOpfDbWBaHOndRjCXIW8jCPNf-F1GiMARQwTd2pD2j4-G6JBlEYo7JLznDc-od2_8AAAAAAAAGNhdGlyY3NlcnZpY2VzLm9yZy9lZk1Oclhla0lqZExOSEdER3VCaFJzRXY>)
<mei[m]> s/main/052b9362683edf44560a5f693fb7e2d1170a135f/, s/L365/L37470a135f/generic/src/decision.rs#L374/
<mei[m]> s/main/052b9362683edf44560a5f693fb7e2d1170a135f/
<mei[m]> (edited my previous messages to use permalinks, which probably looks weird to IRC)
<jn> in the IRC side it's a set of s/// commands
<_whitenotifier-4> [prjunnamed/prjunnamed] meithecatte pushed 2 commits to main [+0/-0/±2] https://github.com/prjunnamed/prjunnamed/compare/052b9362683e...ba7d68cf3da4
<_whitenotifier-4> [prjunnamed/prjunnamed] meithecatte 79b99ab - decision: Add more comments
<_whitenotifier-4> [prjunnamed/prjunnamed] meithecatte ba7d68c - decision: use min_by_key (NFC)
<mei[m]> oh and this comment doesn't entirely make sense because the y rule isn't actually unreachable: https://github.com/prjunnamed/prjunnamed/blob/6bd37834e29bf3917119817036b576fe4521c6e6/generic/src/decision.rs#L228-L234
<leocassarani[m]> <whitequark[cis]> "; scope "top"."fx2_crossbar"."..." <- What does `!1668` mean here?
<Wanda[cis]> metadata reference
<Wanda[cis]> somewhere in the file, the !1668 metadata set is defined, consisting of source location, scope, etc metadata references
<Wanda[cis]> it's heavily deduplicated in memory, hence weirdness
<leocassarani[m]> Ah right thanks, I've just found the roundtrip tests for it
<Wanda[cis]> the printer decodes it to the comments you see above
<Wanda[cis]> the whole thing is closely inspired by llvm
<leocassarani[m]> And sorry what's the deal with (#1 #2) (#3 #4)?
<leocassarani[m]> As in !1 = source \"top.py\" (#1 #2) (#3 #4)
<Wanda[cis]> line 1 column 2 through line 3 column 4
<leocassarani[m]> Aha, thanks — I think I just got confused by this line because of the #1 in the memory (which I guess is just a decimal literal?) https://github.com/prjunnamed/prjunnamed/blob/7f7db32f9ac053d674177e1e558a2bd703c5227a/netlist/tests/roundtrip.rs#L225C69-L225C75
<Wanda[cis]> yeah #123 is just our syntax for decimal numbers
<Wanda[cis]> to disambiguate them from consts aka bitvectors
<leocassarani[m]> Right, otherwise you couldn't parse like 10
<Wanda[cis]> we could tell them apart from context, but that'd be horribly confusing
<Wanda[cis]> also simplifies lexer construction
<Wanda[cis]> which, uhhh, we'll definitely do one day
<leocassarani[m]> Yeah I've noticed a distinct prjunnamed style of writing parsers 😅
<Wanda[cis]> it's better than prjcombine parsers
<Wanda[cis]> hm
<Wanda[cis]> though those usually do have lexers