<doug16k>
forcing it to violate the input section's request(s)
<doug16k>
at gunpoint
<doug16k>
you shouldn't pull your gun in ld script :P
<doug16k>
to be clear: .text ALIGN(4K) : { *(.text); } <-- bad. good --> . = ALIGN(4K); .text : { *(.text); }
<geist>
omg talking to skyz again is so frustraing
<heat>
yeah I don't do that
<geist>
it's like he switches topics in the middle of a sentence
<geist>
says some random thing and then you ask what he means and he switche sto some other random thing
<kazinsal>
not worth imo
<geist>
i know it isn't. it's just like this AI that's trying to frustrate you
<doug16k>
probing for a way to get you really interested in answering?
<doug16k>
what is it you can't resist responding to
<geist>
well, now he's taling to me about fuchsia
<geist>
like asking me questions but then switching topics halfway
<geist>
i ask for clarification and then he just asks another question or makes some random statement
<doug16k>
ah I hate that when I get a technical question and they don't even want the answer
<geist>
this is on discord, he discovered me there because of the discord osdev server presumably
<geist>
now he's telling me we should scrap fuchsia because he doesn't like the 'theme'
<geist>
then i ask him what theme means and he switches to something else
<heat>
it's the wallpaper /s
<geist>
i guess he doesn't like the color or typing the word or something
<doug16k>
people have some pretty wild ideas of what is happening in a computer
<heat>
the great thing about fuchsia is that you learn to spell fuchsia
<geist>
yah and i'm usually very willing to help someone bootstrap themselves
<doug16k>
as if the render of the desktop is anything that matters at all to the project
<geist>
heat: yeah right? took me about a year to really nail the word
<kazinsal>
they have to be capable of being helped though
<kazinsal>
and some people just... aren't.
<geist>
if skyz hadn't at least demonstrated some sort of ability to follow a tutorial and actually get some sort of hello world thing...
<kazinsal>
most of the time it's really an unwillingness, but in that particular case I think it's something a little bit less worth speculating on
<doug16k>
in the entire project block diagram, I find it hard to picture the tiny little box where the theme is
<geist>
but they occasionally have some sort of focus, but otherwise it's just like a random noise generator
<geist>
anyway sorry. had to rant a little bit
<kazinsal>
upgraded from markov chain to tensor grid maybe
<jimbzy>
Hah
<geist>
only a matter of time before they discover this channel though
<geist>
so be ready
* kazinsal
hands out the +5 warhammers of +b
<heat>
ban?
<heat>
worked great last time around
<geist>
yep
<kazinsal>
yeah, it's going to have to be ban + ignorelists
<geist>
also while i was digging through my irssi config i had a ignore list a mile long. guess i should try ditching that and see what happens
<geist>
most of them are aholes from years past that popped into osdev
<geist>
and were generally just noise makers but not really ban level
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<geist>
ah yes, anyone remember Mathis?
<geist>
early to mid 2000s i think i eventually jsut ignored him
<jimbzy>
Yea
<geist>
he had good knowledge but had some UI issues
<jimbzy>
I'm pretty sure I saw them in a math channel I hang in.
<geist>
had the classic 'belittle the person that doesn't already know something' issue
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<jimbzy>
Well, that would explain why they're not in there anymore. That sort of thing usually doesn't fly.
<geist>
right eventually it gets toxic enough that no one comes around anymore
<jimbzy>
That's how the world was before the internet, geist.
<geist>
what before everyone had a soapbox to spread their toxicity?
<geist>
guess i better go mow the damn lawn. it wont mow itself
<immibis>
moon-child: If your software volume is 1/6553 then the output of the mixer still needs to have enough precision, and I hear the human ear has very good dynamic range
<geist>
and it's gonna start raining again
<jimbzy>
No, the whole "My knowledge > Your knowledge" thing
<jimbzy>
The trades are like that in a lot of ways.
<kc8apf>
geist: eh, I've just had to accept mowing in the rain. Never seems to be enough dry days in PNW
<heat>
TIL clang has -Wdocumentation, checks doxygen documentation
<jimbzy>
Nothing worse than being trained with just enough information to do your job poorly so the managers are always on your back.
<jimbzy>
Just spray your mower deck with PAM Cooking Spray.
<jimbzy>
No more clumping under the deck :)
<kc8apf>
or get out the 6' finish mower for the tractor
<moon-child>
immibis: yes, that's why the mixer _mixes_ at higher precision. Once it's done mixing, it requantizes to whatever the hardware supports
<jimbzy>
kc8apf, That'd be great for an urban lot. One pass and you're done.
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<gog>
heat: you are not gog
<immibis>
moon-child: and then all your nice 24-bit values in the range 0-2550 get rounded to the nearest value between 0 and 10, giving you a 3.5-bit sound output?
* heat
meows
<heat>
I am gog.
<immibis>
(after division by 256)
<immibis>
(just estimating the numbers)
<gog>
you're not even a reasonable facsimilie of me
<gog>
you could be tho...
<immibis>
google tells me the human ear has a dynamic amplitude range of 100000x, so you could hear both sounds that go from 0 to 65535, and sounds that go from 0 to 1, but the latter will have hardly any precision
<immibis>
(of course you couldn't hear both at the same time)
<immibis>
(so the human ear hears in floating-point)
<moon-child>
immibis: so what's your proposed solution? Again, the dag only supports s16le
<moon-child>
*dac
<immibis>
well if the dac only supports 16-bit then of course you can't improve that - you can just tell the user to adjust their volume. But I hope that illustrates why someone might want a better format.
<immibis>
I don't think 24-bit DACs are practical, much less 32, but you could have a 16-bit one with a varying reference voltage, i.e. native floating-point
<moon-child>
doug16k's headphones support 32-bit output
<immibis>
for real or for marketing?
<immibis>
they can output precise nanovolts?
<moon-child>
no idea
<jaevanko>
immibis: I think some of that 100000x range is dependent on the ear drum tightening in loud environments to attenuate somewhat, so I don't think you get all of that dynamic range at the same time
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<doug16k>
no it won't be extra precise. funny that you can use that format though, it accepts it
<doug16k>
as if 16 bit isn't good enough
<doug16k>
come on
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<kazinsal>
chances are the masters were 24-bit and then what was actually released was 16-bit so if you're shoving that back into a 24-bit or 32-bit DAC you're actually listening to the computer making noises up
<doug16k>
yeah the extra bits give you good sound when it is really quiet part
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<doug16k>
movie sound I agree, 16 is barely enough
<jaevanko>
16 bits plus a decent dither is plenty
<doug16k>
good to have a few more orders of magnitude to deal with human ability to hear in near silence and thundering noise
<doug16k>
like the blackness in tv screens. crazy about how black it can be. it is also black when it is off :P
<doug16k>
they used to think that if they made it bright enough to cause eye damage, everyone would have to buy it
<jaevanko>
I sure would love to have more oled screens in my life
<doug16k>
I should make the cache line ping pong measurement repeat the measurement and keep the best time, to try to get rid of noises
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<doug16k>
omg I just realized what units those results are in
<doug16k>
that is how many nanoseconds for it to pingpong a line 3 MILLION times
<doug16k>
seems too fast
<doug16k>
45 nanoseconds to pingpong value 3 million times? in nearby core?
<geist>
yah doesn't sound right
<doug16k>
is that believable?
<geist>
think of it, if it ping ponged at 1ns it'd only be able to do 45. if it was running at 10ghz it'd only be able to do it 450
<geist>
er i mean ping ponged every clock at 1ghz
<doug16k>
yeah I must be canceling out 3M somewhere
<doug16k>
oh duh it divides
<geist>
45 *per bounce* actually seems more right, i think
<doug16k>
ya it's per bounce
<geist>
i believe i've seen numbers in that range, especially on Zen which i think is still somewhat behind intel when it comes to low level cache stuff like that
<doug16k>
this is my 3950x - low end of what you expect because 2400 mem
<doug16k>
yours is better
<doug16k>
I was curious what this says for a numa with far away cpus
<geist>
actually a little surprised cores on the same SMT pair aren't basically instant
<geist>
kinda implies that 45 may be some sort off floor?
<doug16k>
they are taking turns I guess
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<doug16k>
45 number has SMT thread off
<doug16k>
going full speed
<geist>
and then the pair seems to be 100ish
<doug16k>
108 number has two threads fighting over execution
<geist>
yah
<geist>
i thin the anandtech matrices have that factored out somehow, or they leave SMT out of it because it just generates noise
<doug16k>
but the data is not all perfectly regular like you would expect
<geist>
they have similar graphs but i think the numbers are about half or so
<doug16k>
must be some multihop network
<geist>
so maybe they're /2
<geist>
well yeah remember your zen 2 16 core is two zeppelins each with 2 sets of 4
<geist>
so there's stuff on the same L3, stuff on a nearby L3 and stuff on a faraway L3
<doug16k>
ya it's 4 quad cores with pairs of quads per die
<geist>
zen3 integrated it so that each zeppelin is at least one big L3
<doug16k>
ya this is 3950x (zen2)
<geist>
anyway, afk for a few
<doug16k>
each quad core has its own 16MB L3
<doug16k>
64MB L3 all together
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<ZetItUp>
wooh
<doug16k>
zen3 one makes it two 32MB L3s on 5950x
<doug16k>
one bit L3 for 8 cores
<doug16k>
one big
<ZetItUp>
spent half day using Visual Basic, kept adding ; at the end of the line until it drove me insane, now im back to C and im not putting ; at the end of lines :P
<meisaka>
I tend to do that when going between python and javascript
<ZetItUp>
hehe :D
<doug16k>
shoot me if C++ ever gets automatic semicolon insertion
<doug16k>
being able to skip it in js drives me nuts
<doug16k>
on parse error, back up to last newline and try again with a semicolon there
<doug16k>
cuckoo
<ZetItUp>
yee
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<geist>
i think you could shorten that to
<geist>
on javascript ... drives me nuts
<seL4>
become a javascript interpreter
<seL4>
run code in your brain
<geist>
then immediately observe the brain rot set in?
<seL4>
do you think that is a feasible approach for most websites?
<seL4>
using a text based browser
<seL4>
some* websites
<seL4>
have user attempt to manually interpret javascript and reparse website
<seL4>
so if they have something they care about, they can do that
<seL4>
I wrote a text based browser which does that
<seL4>
you don't have javascript interpreter so user has to interpret javascript manually
<doug16k>
geist, so you aren't switching to just throwing npm modules into a project until it's done. got it
<seL4>
you edit raw html then reparse using a keybinding
<seL4>
all vi keybindings + all vi features
<seL4>
something simple like ajax request can be changed into link that you open in new tab
<seL4>
trying to use this web browser full time
<jaevanko>
$ npm install bare-metal
<seL4>
its also possible to write a script for websites that you need but require javascript that allows you to possibly simulate javascript
<ZombieChicken>
seL4: That sounds painful and error-prone
<jaevanko>
What do you script in?
<seL4>
vimscript
<jaevanko>
Is the whole thing a vim plugin?
<seL4>
ZombieChicken: yes but thats why you do it only for important sites
<seL4>
no not a vim plugin
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<ZombieChicken>
seL4: No site is important enough for me to parse JS mentally (which would require me to learn JS to begin with), then try and run a loosely-types, dynamic language in my head. I have enough headaches as it stands...
<jaevanko>
One big advantage: if you don't like what the JS on the site does, you can just pretend it does something else
<seL4>
my school website requires js but is an ajax request so I just manually parse or script it
<seL4>
yeah, you can do that
<geist>
doug16k: honeslty i've written like zero javascript
<geist>
i'm just parroting the usualc omplains
<doug16k>
I started js in netscape navigator
<doug16k>
win3.1 trumpet winsock :P
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<doug16k>
omg my js code I saw from then is hideous
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<doug16k>
there was no ajax it was so bad
<doug16k>
contraptions to reload the page for everything and reconstruct state somehow, lol
<doug16k>
hilariously easy today
<doug16k>
or even make something change on the page without reloading, once you are super elite
<doug16k>
now you just laugh and put a 3d matrix somewhere and whole site flies around 3d
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<doug16k>
tween a bunch of animations of hierarchical transformations
<doug16k>
I guess if you just looked at the cache cpuids you could be told this information, but not the absolute latency
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<doug16k>
just vague relative idea
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<doug16k>
man gcc is doing a thing where the first step of a function is the return at the end, then step starts stepping the function. really?
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<doug16k>
I'm like, oh returning eh? thinking... and it isn't
<doug16k>
stupid
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<ZetItUp>
hmm am i just being stupid right now, messing around with 64bit int and i just did this for testing and, there must be an easier way to achive that?
<geist>
it's also entirely likely the compiler will just figure it out if you do it the slow way
<geist>
it'll just movabs a constant and be done
<doug16k>
if it was 1999 I might say: uint64_t blank = (DEFAULT_TEXT_ATTR | 0x20); blank |= blank << 16; blank |= blank << 32;
<geist>
which is still probably the fastest way to get bottom 8 bits into all the bytes
<geist>
for memset, etc
<geist>
doug16k: i am going a bit daft though, the mul by 0x00010001... that broadcasts it across the register?
<doug16k>
yes
<doug16k>
assuming the lhs is not too wide
<doug16k>
if wide then carry makes a mess
<geist>
in all my years of programming i've never considered using a mul like that as a broadcast
<doug16k>
then it'd have more 0 in the rhs
<doug16k>
I guess just doing software mul on 8 bit made me realize
<geist>
i guess it's ecause tradtionally doing the mul and getting the constant in registers and wahtnot have not been faster than shift and or
<doug16k>
of doing big mul with fragments of not so big mul
<doug16k>
or*
<geist>
most arches i've seen dont have a mul by immediate eitehr, so you have to first get the thing into a register
<doug16k>
ya
<geist>
(except for mul by small immediate via shift, etc)
<doug16k>
you won't beat the mul with shifts on ooo x86s
<doug16k>
same
<doug16k>
fewer instructions with mul
<doug16k>
less backend resources
<doug16k>
should be 2 cycle latency if you use low half and 3 if you use whole thing. this uses low half only
<doug16k>
you get low half in 2 but can't get high half until 3
<doug16k>
you might end up where it could issue shifts sooner than a mul
<doug16k>
so it depends like always
<doug16k>
all else being equal, fewer instructions helps emulation
<doug16k>
and translation
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<doug16k>
rest are muxed to add zero
<doug16k>
or whatever optimizer did that is same
<doug16k>
64 adders that may or may not add lhs shifted by an amount to the total
<doug16k>
where "an amount" is 0 thru 63, one for each bit of rhs
<doug16k>
if that rhs bit is 1, it is added
<doug16k>
that's the theory of * 0x0001000100010001's operation
<doug16k>
adds it once at << 0, once at << 16, once at << 32, once at << 48
<doug16k>
starting at rightmost bit
<doug16k>
I should have said 48 32 16 0
<doug16k>
same thing
<doug16k>
blows me away that mul is essentially a chain of 64 64bit adders and 2 cycle latency
<doug16k>
gives you an idea how easy "add" really is
<doug16k>
add two numbers is a waste apparently
<doug16k>
could do way more work in that cycle
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<doug16k>
add is like being given an hour to do something you could do in two minutes, right? if mul can stack 32 of them in 2 cycles?
<doug16k>
er 64 of them
<doug16k>
they don't naively stack them of course. they ingeniously optimize it, but still, the spirit is still there
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<doug16k>
yay! now can flick uefi to use my fat32 and iso impl in bootloader using block apis instead of uefi, or switch it to use the uefi fs. had to do all my utf8 or utf16 handling tricks (tchar) in fs since usable in uefi now
<geist2>
well, mul is also an example of 'dont look at how the sausage is made'
<geist2>
as in sooo much hardware
<Mutabah>
serial adder... but that's probably not the fastest implementation
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<lleo>
shift
<lleo>
gg'moin
<radens>
Hello, I want to intercept COM1 interrupts with an x86 vmx hypervisor. What are the right & reasonably efficient settings in the VMCS to do so?
<radens>
Also, mixed feelings about the libera move -- as a very casual irc user these days I wish there was a web client for libera like webchat.freenode.net
<doug16k>
how can you even stand to use a web client
<doug16k>
native one feels way better
<doug16k>
any second web client is going to find some excuse to make you not in the room
<bslsk05>
kiwiirc.com: KiwiIRC - The webIRC client
<radens>
doug16k: I only use irc to ask questions in this channel. My only machine on 24/7 these days is behind a corporate firewall, so there isn't much to lose.
<klange>
Kiwi's always been okay if you want a web client. There's no reason for Libera to self-host one, and there was no reason for Freenode to do so.
<doug16k>
neatg
<doug16k>
-g
<moon-child>
yeah. Might be worth endorsing it though
<bslsk05>
libera.chat: Choosing an IRC client | Libera Chat
<radens>
Kiwi is good. I just appreciated the freenode hosted web client. It made it easier to get into irc especially considering the aforementioned corporate firewall
<radens>
Anyway, anyone have any advice re the vmcs config?
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<doug16k>
24.9.3 ?
<doug16k>
enable "external-interrupt-exiting"
<doug16k>
26.7.5
<air>
klange: do you know why the logs are no longer available?
<air>
for download
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<radens>
doug16k: yeah, so I enabled that, and I'm not sure how I'm supposed to know which interrupt I got. Also, frankly I'm a little fuzzy on the correlation between IOAPIC register table number and IDT vector and ISR number, and maybe the PIC is involved in all of this too?
<doug16k>
1st one I mentioned
<doug16k>
you know where pic is?
<doug16k>
pic is a special delivery type
<radens>
Special delivery type?
<doug16k>
one sec let me see where to look in manual
<doug16k>
pic is exint
<doug16k>
10.5.1
<doug16k>
not seeing anywhere you get that
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<doug16k>
pic goes into LAPIC yeah
<doug16k>
special delivery type
<doug16k>
it doesn't do anything with it. must be level assert deassert or something
<doug16k>
doesn't latch it in IRR or whatever I mean
<doug16k>
no EOI
<doug16k>
you sidestep LAPIC to EOI it directly into it
<doug16k>
presumably that sends a level deassert to LAPIC
<radens>
This damn architecture
<radens>
or platform?
<radens>
Hell where does one end and the other begin?
<doug16k>
doom for dos works on 3950x
<doug16k>
in dos 6.22
<doug16k>
that's why
<radens>
People want doom for dos to run, but they don't actually care if it secretly runs in dosemu
<doug16k>
I will hold a vigil when dos 6.22 doesn't work on an x86 processor
<radens>
I will hold a candle and then stop off at the bar to rejoice on the way home
<doug16k>
I want the compatibility to hold long enough that one fetch cycle can get the entire function for at least 75% of doom's functions
<air>
klange: nm, he fixed it, stats are working now
<doug16k>
you should see how it runs though. timedemo is hilarously fast on baremetal
<doug16k>
probably due to literally 100% cache hit rate
<doug16k>
it's practically cache-as-ram in DOS
<doug16k>
dos thinks one of my 4 16MB L3 is a lot of ram
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<doug16k>
so you run smartdrv with large cache
<doug16k>
now smartdrv is L3. so now it's disk-as-fast-as-l3
<radens>
doug16k: do you know the right way to figure out which interrupt triggered the vm exit if I use the execution control bit you recommended?
<doug16k>
so you sit there at 100% hitrate and your disk I/O is basically an L3 backed ramdisk
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<radens>
There's a bunch of field which look promising, but they are all set to zero when an interrupt occurs.
<doug16k>
yes that was the 1st thing I pointed to
<doug16k>
24.9.3 Information for VM Exits That Occur During Event Delivery
<doug16k>
are you already reading the vectoring information field?
<radens>
I think so, but let me do a build which explicitly prints it out
<doug16k>
external-interrupt-exiting is 1
<doug16k>
right?
<radens>
yep, because my basic exit reason is external interrupt
<doug16k>
ok
<radens>
There's another one which is named similarly but is also 0
<radens>
let me see here
<doug16k>
you get the vmexit even if they are in cli
<doug16k>
in case you didn't know
<doug16k>
makes sense right?
<radens>
24.9.2
<radens>
(also 0)
<radens>
guest rflags is 202
<radens>
But yes I will need to enable interrupt window exiting and cache interrupts which come in while IF=0
<doug16k>
yes and manually reinteject them right?
<radens>
I think I will need an array of like 255 counters for that, and I may need to consult the ioapic to see if the cpu which received the interrupt is program to actually service it? Not really sure, I don't understand the interactions between the lapic and ioapic and vmcs
<radens>
doug16k: yes, that's the plan
<doug16k>
you play cpu and poke their interrupt frame in and put them in the ISR?
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<radens>
I don't think they get an interrupt frame unless I inject it, right?
<doug16k>
idk
<radens>
And I can't inject it if it's zero, right?
<doug16k>
eflags.if? right
<radens>
guest rflags is 202
<radens>
I think I'm in "read the bochs source" territory here
<doug16k>
1st 2 is if=1
<radens>
yup
<doug16k>
cue beetles number 9 weird song
<doug16k>
bea*
<sortie>
Good morning osdev!
<radens>
uh doug16k is your bochs fork on github? Just want to browse reasonably up to date bochs source on the interwebs
<sortie>
It is I. sortie. In this new beautiful libera realms of ours.
<radens>
g'mornin' sortie
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<doug16k>
radens, not sure how up to date but not bad and has best long mode debugger functionality
<doug16k>
most of my debugger fixes and improvements went into main bochs but not all
<doug16k>
and if you breakpoint close enough to be uniquely one match, that's good enough
<doug16k>
lb somefu would work if it matches one
<doug16k>
blist shows the actual names
<doug16k>
if it matched 2 nothing happens and it fails
<doug16k>
and when failing list all the matches
<doug16k>
so you know how far you need
<doug16k>
you can generate bochs symbols from screwing around with objdump output
<doug16k>
then bochs says good names for functions and stuff
<doug16k>
decodes names of global variable accesses, etc
<doug16k>
rip relative shows operand name if it has a symbol
<doug16k>
r attempts to symbol lookup every register value and shows some names sometimes
<doug16k>
info idt shows entry point names if it can
<doug16k>
I think
<doug16k>
added "trace ram" which is like trace on but don't show it if ip is within 0xa0000-0xfffff
<doug16k>
hides bios code
<doug16k>
you don't want to look at bios code trace instructions ever
<doug16k>
added option to make serial output "turbo" so no matter how fast you write it, it's good
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<doug16k>
transmitter holding register is empty forever. it's a perfect vacuum in transmitter holding register, not even one virtual particle
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<doug16k>
normally bochs would not be joking and would bottleneck you to 115200 or whatever
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<vai>
hi
<GeDaMo>
Hi vai :)
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<doug16k>
I may have touched something to do with 5 button ps2 mice
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<radens>
acknowledging interrupts is not the same as an EOI, right?
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<doug16k>
radens, depends on what context
<doug16k>
eoi is acknowledgement of an irq
<doug16k>
it means unmask that irq and all lower priority ones being masked by it being in service
<doug16k>
it is guaranteed to be the lowest set bit in ISR register
<doug16k>
being "acknowledged"
<doug16k>
in either PIC or LAPIC that is true
<doug16k>
lapic just has giant 256 bit ISR register
<radens>
okay, when talking about virtual interrupt acknowledging on vm exit, I thought that meant automatically acknowledging an irq when a vm exit occurred
<doug16k>
if you are handing interrupt vector N, then you are implicitly masking everything that would cause vectors N-255 to execute
<doug16k>
eoi means stop doing that
<radens>
but I don't think it does, I think it means telling the interrupt controller that the VMM will handle it/re-inject it
<doug16k>
make that happen for next one in service
<doug16k>
or none
<doug16k>
which eoi where do you mean
<doug16k>
sorry I see "talking about virtual interrupt acknowledging"
<doug16k>
ya I see what that means
<doug16k>
you want that on. it means, accept that interrupt vector from the PIC
<doug16k>
that is how it loads value into those exit structures
<radens>
Yeah, exactly, I thought it meant do an eoi, not accept it
<doug16k>
means it is ok do the extint bus cycle to get pic vector number
<radens>
Okay, so the interrupt came in on vector 0x68. I want to handle interrupts which come from com1, which is like isr4 or something, right?
<radens>
So what vector number am I like actually looking for?
<doug16k>
yeah so they meant the implementation detail that the cpu bus cycle protocol at one point got the vector number from that acknowledgement cycle
<doug16k>
pic protocol
<doug16k>
you have to know where their pic is if they are using pic
<doug16k>
you can bet on com1 being irq4
<doug16k>
you have to know what the vector means
<doug16k>
you can know the ioapic inputs and pic inputs and isa and all that and figure it out, lol
<doug16k>
do you know pic base?
<doug16k>
ioapic addrs?
<doug16k>
how does that part work
<radens>
By pic base you mean a port address and iopic base you mean a physical address, right?
<doug16k>
no pic base means base vector number
<doug16k>
it's that aligned-to-8 number to that plus 7 vector number mapping
<radens>
It's a uefi guest, and I might be able to get it to tell me, but that might change when the host boots and does exit guest services and reprograms them
<doug16k>
low and high 8 are separate
<doug16k>
like mapping irq0-irq15 to vector 0xf0-0xff
<doug16k>
you map pic1 to 0xf0 and pic2 to 0xf8
<doug16k>
0xf0 is pic base
<doug16k>
that's what I mean
<radens>
Okay, so I need to peer into the guest and decide: 0. Where are the pic & ioapic? 1. is the guest using ioapic & lapic, or pic? (How do I do this?) 2. Is the interrupt in question masked by the appropriate interrupt controller? 3. Is IF=0? and decide weather to cache the interrupt or not.
<doug16k>
then in their IDT, the [240] to [255] entries are irq0-irq15
<doug16k>
you aren't even trapping and emulating yet right?
<doug16k>
:P
<radens>
I am for CRs and simple ins and outs
<doug16k>
nice
<radens>
rep insd is trapped but not emulated
<doug16k>
I think you can read back the vector thing
<radens>
the field you found here? 24.9.2 Information for VM Exits Due to Vectored Events
<radens>
It gives me a vector, but I don't quite understand what sort of a vector. IDT vector? IRQ vector? Something else?
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* gog
meows
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* meisaka
nyans
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<mallow>
why exactly do ELF binaries contain the path to the dynamic linker?
<clever>
mallow: 32bit and 64bit need a different dynamic linker
<nero>
each different abi needs a own dynamic linker
<clever>
it also allows things like arm and x86 binaries to co-exist on a single /, with different dynamic linkers, and qemu-user makes it "just work"
<mallow>
nero: sure, but don't you have a unique ABI in your platform?
<mallow>
unless using qemu / static binary translator / etc
<nero>
both musl and glibc on same system
<mallow>
yes but they both target x86-64 ABI (on x86-64 platforms) ?
<lleo>
filemagic of binfmt
<nero>
they are not fully compatible.
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<sortie>
That's right, come join the new home for #osdev at irc.sortix.org
<sortie>
I just have the network running and no services and probably might not leave it up if people aren't coo :)
<immibis>
I expect ELF binaries contain the path to the dynamic linker because otherwise the system would have to assume one, right?
<immibis>
and the kernel doesn't want to be responsible for that sort of policy?
<immibis>
(IMO embedding that policy into the kernel is still better than hardcoding it in every single binary...)
<clever>
immibis: darwin rejects any binary where the dynamic linker path doesnt match the approved one
<clever>
due to that "feature" you cant use a custom dynamic linker, and you cant have static binaries
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<Oli>
You reminded me of the environment variable "CC" I have seen used to specify a C compiler on source build systems, offering the liberty to override at, may one desire to use a GNU C compiler, Clang, or otherwise.
<clever>
the nix package manager will point CC to a cross gcc automatically, so basic things (blindly using $CC and $LD) will magically cross-compile without any fuss
<Oli>
An conceptually-similar LD environment variable feature offers a nice liberty in my mind
<Oli>
For ELF binaries*
<Oli>
Security concerns come to mind by that approach, however.
<Oli>
As any could set a LD environment variable, and point to any script of executable; but Linux filesystem permissions can work it out if set precautively
<clever>
if an attacker can set env vars, your already screwed
<clever>
many vars can be used as an exploit chain
<immibis>
clever: well, that's apple being apple. comply or perish
<bslsk05>
'Delta Heavy - Ghost (Official Video)' by DeltaHeavyVEVO (00:04:05)
<heat>
sortie, is it down now? :(
<jstoker>
sortie, again, that's pretty damn sweet. the amount of bits you'llve had to implement to get it working that far. :-) out of curiosity, is your os open source?
<alexander>
heat, he said he had to restart it to fix a printf bug 20 minutes ago, I don't think it's back up yet
<heat>
sad :(
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<sortie>
heat: alexander: jstoker: Alas, something went wrong, perhaps due to the load or luck. The connections of mine seemed to time out because the ident check + host lookup took too long for some buggy reason (need to debug) plus the solanum process seemed to disappear for some reason (either exited or crashed, likely some bug)
<sortie>
I'll focus on a few other things and then after dinner perhaps see if I can't bring it back online again
<vancz>
reposting here because someone said someone here was familiar with the secure c coding books;
<vancz>
from Modern C: "Many of the functions in the C library are vulnerable to buffer overflow C if they are called with an inconsistent set of parameters." [...] "C11 addressed this sort of problems by deprecating or removing some functions from the standard and by adding an optional series of new interfaces that check consistency of the parameters at runtime. These are the bounds-checking interfaces of Annex K of the C standard." [...] "This mechanism was (and still
<vancz>
is) open to much debate, and therefore Annex K is an optional feature. Many modern platforms have consciously chosen not to support it. There even has been an extensive study by O’Donell and Sebor [2015] that concluded that the introduction of these interfaces has created much more problems than it solved." -> http://www.open-std.org/jtc1/sc22/wg14/www/docs/n1969.htm
<vancz>
wat do?
<vancz>
the field experience was published in 2015, taking a superficial look at the CERT C coding standard book (2016) and "secure coding in c and c++" (2013), those appear to recommend using annex k
<bslsk05>
www.open-std.org: N1969 — Updated Field Experience With Annex K — Bounds Checking Interfaces
<sortie>
jstoker: Absolutely, soooo many of work pieces that I've done over the years went into making this relatively easy to do. It's the fun part of osdev where crazy infrastructure things become plausible :) The sources are up there yeah, although mind that this particular version runs on a ton of non-merged stuff to master
<sortie>
Totally should, uh, keep finishing my stuff instead of (checks notes) spontaneously porting an ircd
<sortie>
I do hope this inspires more folks to self-host their infrastructure
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<sortie>
I think very few operating systems actually both self-host their website and chat
<bslsk05>
man7.org: tc-netem(8) - Linux manual page
<immibis>
tun or tap. Tap is ethernet layer so it might be able to test more of your network stack
<immibis>
although it probably makes no difference at all
<immibis>
so idk why i mentioned it
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<catern>
and this tc netem stuff even works in an unprivileged netns, a m a z i n g
<catern>
so I'll set up an unprivileged netns, run my TCP stack against a TAP inside the netns, set some packet loss options on the TAP with tc-netem, then connect to my stack with regular Linux AF_INET sockets and start speaking some protocols
<acidx>
netem was crucial when writing the zephyr os TCP stack
<acidx>
can't recommend enough
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<sortie>
heat: OK irc.sortix.org is back up
<heat>
"irc.sortix.org[0.0.0.0/6667]"
<heat>
very interesting IP address :P
<sortie>
heat: Means it's listening on all interfaces
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<sortie>
heat: Inside the VM it's 10.0.2.15 (qemu slirp)
<heat>
hmm, libera's irqd gives me an actual IP
<heat>
ircd**
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<sortie>
heat: Depends on ircd.conf, what interface/IP it's configured to listen on
<Arsen>
sortie: what os is that? :^)
<Arsen>
(asking here instead of #solanum)
<sortie>
Arsen: That's my sortix.org operating system hosting it :)
<sortie>
This is all unofficial prerelease magic that's not merged to master but super fun to play with on my last day of vacation :)
<Arsen>
that's neat
<Arsen>
you should fuzz the netstack
<Arsen>
the internet is a scary, dangerous place
<sortie>
Arsen: Heck I should finish.. code reviewing my netstack. It's a key reason why it's not merged to master
<Arsen>
hah, fair
<sortie>
Arsen: This demo and the other httpd one are both proxied via Linux host into the qemu VMs, so that at least rules out IP/TCP level trickery
<heat>
how do you fuzz a network stack?
<sortie>
Normally
<Arsen>
you send random data at it on various layers
<heat>
nmap?
<heat>
sending random data isn't particularly useful
<heat>
unless you also have coverage data and do something like syzkaller
<Arsen>
first you dump random data onto L1, then L2, then random IP packets, then random TCP/UDP packets, then random ICMP stuff
<heat>
it *works* but you don't touch every code path
<Arsen>
well, yes, random meaning guided
<heat>
so it's not really fuzzing as it is throwing shit at the wall and seeing what sticks
<Arsen>
that's what fuzzing is :^)
<kazinsal>
a good test is to throw packets at it that it may need to fragment or adjust in some way
<heat>
not really
<acidx>
a good strategy to fuzz a network stack is to mutate only fields that would ultimately be used to index some memory
<heat>
fuzzers try to touch every code path you have and have some sort of logic behind it
<kazinsal>
something the stack needs to manipulate instead of just look at
<Arsen>
yeah
<heat>
not just for(int i = 0; i < size; i++) buf[i] = rand();
<acidx>
so don't really send only random garbage, be a bit smarter with what you'll mutate
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<acidx>
another good candidate are things like TCP flags. you can capture for instance a TCP connection hanshake, some data flowing both ways, and the tear down of a connection, and fuzz flags for instance, just to see how your stack reacts to unexpected flags
<Arsen>
make sure to send it stuff that's clearly invalid, too, short packets, fragmented tcp packets (which the spec forbids), stuff like that
<acidx>
yeah, there are lots of things you could do. test all assumptions in every state of the TCP machine for instance
<heat>
Arsen: fairly sure you can fragment TCP packets at the IP layer
<heat>
it's just less good
<Arsen>
heat: you can, but TCP says that you must not, and that all tcp packets must have the NF flag
<sortie>
Hey kazinsal, come join us :)
<Arsen>
(since TCP does path mtu discovery and adjusts according to that etc, all of that goes down the toilet if you fragment)
<heat>
hm, really?
<heat>
I don't remember that
<Arsen>
it's possible that's something outside the RFCs that modern stacks implement, though
<Arsen>
if you tcpdump your traffic right now and get some IRC msgs you'll see the DF flag
<heat>
I've sent fragmented TCP packets and everything works
<heat>
sure but that's because of Path MTU which you can disable
<sortie>
acidx: Tiny details to make it seem powerful when it's really really simple and dumb lol
<acidx>
ah, just remembered: one thing that helped me debug some issues with the zephyr tcp stack was to validate each state transition. it's pretty easy, just a uint32_t[MAX_STATE] array, where each element has the nth bit set if transitioning from a state to another is expected
<acidx>
it's simple and efficient and helped me find a couple bugs
<acidx>
useful if you end up fuzzing
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* geist
yawns
<ZetItUp>
i just woke up, slept over 13 hours wth
<geist>
yah happens huh. guess you had some hours saved up
<ZetItUp>
ye probably, had music on my phone also, and i dreamt that my headset broke and i tried to fix it, screwed it apart and still it was playing music, was furious, woke up and the music was still there hehe
<kazinsal>
hooray, first dose acquired. also, ow, my arm
<k4m1>
nice
<Izem>
congrats on your civic duties
<kazinsal>
bizarrely the actual shot was one of the least painful I think I've ever gotten
<sortie>
Heyyo klange
<sortie>
Feeling good?
<doug16k>
yeah once in a while it's a nurse that gave infants needles for years :D
<kazinsal>
sortie: I see you have a new IRC network
<doug16k>
I have had ones I almost could feel
<geist>
kazinsal: which vax?
<doug16k>
couldn't
<kazinsal>
geist: moderna
<geist>
yay. high fives
<sortie>
kazinsal: Hostile takeover freenode shame on you, me not hostilely replacing libera shame on me
<geist>
moderna club 4 eva
<sortie>
kazinsal: Come hang :)
<sortie>
kazinsal: No trouble getting the next dose? :)
<kazinsal>
Yeah, apparently they'll just send me a text message in a couple months
<geist>
it's supposed to be 4 weeks for moderna
<kazinsal>
then back to the same arena-turned-immunization-clinic for dose 2
<kazinsal>
yeah, we're going with extended time between shots up here because apparently that can increase efficacy or something
<vai>
whats up here :) I am watching YouTube / Nostalgia Nerd, and a document on Cyrix
<geist>
and/or a way to deal with the shortages
<kazinsal>
yeah, we had some gnarly shortages for a while and then all of a sudden we started getting more moderna shots per day than we were previously able to vaccinate per day total
<geist>
kazinsal: if you have the same experience i have with moderna. shot doesn't hurt at all, in about 12h your arm will be very sore for about 24h then drops fairly quickly
<doug16k>
china has more percent vaccinated than canada. it's a joke
<kazinsal>
so now we're cranking through the population and are at like 70% immunization average
<geist>
shot #2 in about 12h you feel like you got hit by a car for about a day
<kazinsal>
BC is going absolutely wild on shots now
<geist>
much stronger than most people feel with pfizer
<kazinsal>
yeah, that's what I'd heard
<geist>
that's precisely what i experienced. i slept for like 14 hours that day
<froggey>
look at all these antibody-havers bragging. tch. I gotta wait two more weeks for my first dose
<geist>
then it just turned off. within a handful of hours basically felt okay again. so was just your immune system going nuts for a short while
<kazinsal>
I'll aim to take a vacation day or two afterwards
<geist>
not a bad idea
<sortie>
kazinsal: Automatic text message sounds good :)
<sortie>
Unclear how the booking system works here... very very last in line
<kazinsal>
froggey: oof. in BC it's being done strictly by age bracket and I registered on the first day they opened it up to the 25-29 group. still had a week and a half between signup and appointment
<sortie>
(by govt policy, I am the wrong age)
<sortie>
The 30-34 group here is way at the end
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<kazinsal>
oh interesting
<froggey>
yeah, same here (UK). registration for the 32+ group opened up a few days ago and I registered right away
<geist>
well grats
<kazinsal>
they opened registration for all 18+ a few days after they opened the 25-29 bracket
<kazinsal>
I look forward to my improved cell reception and brunch capabilities in two to three weeks
<geist>
brunch capabilities check
<froggey>
actually kind of annoyed, cause I *just* missed getting a place for my local center, two minutes walk away, now I gotta travel 20 miles :(
<kazinsal>
the #osdev mimosa club
<geist>
so i've heard here in seattle the restaurants (the ones that survived) are starting to all get booked up
<kazinsal>
aw dang. the local health authority is using a WHL arena about a mile from my apartment as a mass immunization clinic
<geist>
froggey: yah when it opened up here i jumped on the first slot i could find anywhere, because i had no idea if there was going to be a huge run on limited supplies
<geist>
then not 12 hours later appointments opened up like literally walking distance from my house
<geist>
but i already had it booked, so... ended up driving 20 miiles
<kazinsal>
I was hoping to walk to and from it this morning but nope, I live in the PNW so it's raining
<geist>
you just put on your north face gear cmon
<geist>
rain doesn't stop PNWers
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<kazinsal>
haha
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<radens>
Just want to double check -- for x86 vmcs, if the external interrupt exiting vm executing control field is set, and the acknowledge interrupt on exit vmcs control field is set, but the guest has rflags.if = 0, then the vmm has to cache the interrupt signal and enable vm interrupt window exiting, right?
<radens>
How many interrupt signals do I need to cache? And I should deliver the signals in priority order, right? Also, does the cache need to be per-core, or global?
<radens>
Or is the per-core/global scope interrupt dependent :/
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<Bitweasil>
radens, that's probably covered in the "implementation notes" chapter of SDM3 on the VMCS.
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<Bitweasil>
Is gorgonical around? I think he's messed with that sort of thing. I've never had to deal much with interrupt routing with VMCS.
<Bitweasil>
I would assume the cache would be per-core, as you can have both internal interrupts from the APIC as well as the global stuff routed in from the IOAPIC.
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<radens>
Really wish there was an external interrupt exiting bitmap so I could handle just the interrupt I care about and let the guest take care of everything else
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<radens>
but it seems like there are architectural reasons why this would be hard
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<Bitweasil>
That stuff is mostly external to the CPU, though.
<Bitweasil>
... sort of. :/
<Bitweasil>
Used to be, historically, even if it's on die now-ish.
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<kazinsal>
in my experience interrupts get a lot easier to handle when they're edge triggered instead of level triggered
<kazinsal>
don't have to worry about finding what bits to twiddle or what obnoxiously slow ISA I/O ports to frob in order to deassert things
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<froggey>
sortie: the topic in the old country should probably specify the new channel name too, seems a bit obvious but better to be clear
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* gog
meows
* froggey
pets gog
<sortie>
Hey gog come join irc.sortix.org. We have fish and no volcanoes!
<sortie>
We're gonna make a federation of hobbyist OS ircds bolted together into a dubious quality IRC network
<froggey>
hmm. I don't think cl-ircd supports linking
<sortie>
solanum that I'm using definitely does since it's powering some big nets
<sortie>
I wonder how compatible ircds needs to be to be linked
<bslsk05>
Jigsy1/mIRCd - An IRCd written in mIRC scripting language (mSL) and more or less based on ircu IRCds. (0 forks/1 stargazers/Unlicense)
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<froggey>
sortie: damn, I'm gonna have to get ports forwarded and actually figure this out. it's such a terrible idea I can't resist
<sortie>
:D
<gog>
i'm gonna write a kernel that's an irc daemon
<gog>
its only purpose
<gog>
well also the network stack
<gog>
and some means of persistent storage
<gog>
hm
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<sortie>
froggey: How feasible is it for you? :)
<froggey>
forwarding ports? easy. bodging link support in? no idea
<sortie>
Yeah
<sortie>
I got a VM in a data center running this, the host Linux qemu doing some quick port forwarding
<CompanionCube>
relevant: 'The TS6 protocol is an extension to the Internet Relay Chat protocol for server to server communications developed initially by the developers of ircd-ratbox. It has been extended by various IRC software and has the feature that proper implementations of TS6 can link to each other by using feature negotiation—even if features are disparate. '
<bslsk05>
github.com: charybdis/ts6-protocol.txt at master · charybdis-ircd/charybdis · GitHub
<sortie>
Yeah I think charybdis got forked into solanum
<sortie>
I did ponder about the interserver protocol
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<geist2>
iirc it's basically the same as the client protocol?
<geist2>
i guess a naieve implementation just rebroadcasts all the messages to all of the peers and the servers are responsible for filtering and delivering to the right clients
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<immibis>
gog: so a unikernel linked with some off-the-shelf IRC server?
<Bitweasil>
Unreal IRCd in a kernel running in unreal mode?
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<jimbzy>
It's pretty unreal, Bitweasil.
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* Bitweasil
worked out that something like 5% of my house power goes to the internet connection now. :(
<Bitweasil>
At least during low use times.
<Bitweasil>
er, low power use.
<doug16k>
once you get down to really low electricity use, most of bill is delivery and you might as well not suffer too much and don't worry too much about things being on
<Bitweasil>
... no, the stupid Starlink dish pulls 100W, 24/7.
<Bitweasil>
I don't draw that little power.
<doug16k>
ah
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<doug16k>
your power like 8-9 cents/kWh?
<doug16k>
~9 cents every 10 hours right?
<Bitweasil>
Somewhere in that range, yes.
<Bitweasil>
So about $100/yr in power for the dish alone.
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<vai>
WinXP SP3 runs really neatly on AMD Quad Core & VirtualBox on top of Ubuntu 20.x
<jimbzy>
that's about what I pay, doug16k.
<Bitweasil>
I imagine!
<vai>
allocated 768 megabytes of my 8 gigabytes host system to XP
<vai>
RAM
<jimbzy>
It varies between 0.07 and 0.11 depending on the time of day.
<doug16k>
lucky you. I am still on weird covid time of day where it is same rate all 3 times lol
<doug16k>
can't complain I guess. 8.5 no matter what time
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<jimbzy>
It's actually a bit cheaper here than my old location, but the service is 100% better.
<j`ey>
I have no idea what I pay for electricity :|
<jimbzy>
We'd have an unexpected outage or two per month there, but it's rock solid here. We have our own municipal natgas plant, our own solar farm, and a plant at the landfill.
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<doug16k>
vai, amd always had pretty good virtualization
<doug16k>
there were times when it was way better than how intel did it early on
<heat>
the biggest issue I have with virtualisation is graphics stuff
<heat>
always so slow
<doug16k>
I thought that, went crazy optimizing my blitting, and realized it didn't need to be that good at all
<heat>
(I mean desktop linux/windows stuff, not my own OS)
<doug16k>
it's full ram bandwidth fillrate
<doug16k>
ah
<doug16k>
i went so nuts that I will try to use ssse3 if it helps that pixel format and you don't have avx, lol
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<heat>
it's 2020-fucking-one and there's still no decent GPU acceleration out there
<Bitweasil>
Yup.
<kazinsal>
I think a number of AMD cards allow for GPU virtualization now at least
<kazinsal>
not sure how well it works though
<Bitweasil>
Intel does too, nVidia does if you pay through the nose, etc.
<heat>
you can passthrough sometimes but, well, you need to PCI passthrough
<Bitweasil>
Virtual device passthrough and such.
<Bitweasil>
It's designed for datacenter virtual desktops, not "home user desktop use" stuff.
<heat>
intel has that virtual device thing but it's broken as hell in linux at least
<Bitweasil>
*shrug* virtio isn't half bad if you can find drivers for it.
<doug16k>
find?
<heat>
broken as in, ubuntu livecd doesn't boot
<doug16k>
you want the redhat iso
<Bitweasil>
<heat> intel ...i...s broken as hell in linux...
<Bitweasil>
doug16k, does that have drivers as far back as XP?
<Bitweasil>
I know for Win10 it works for net/block/GUI.
<heat>
Bitweasil: is it? never had issues
<Bitweasil>
Oh, I'm still just bitter about Meltdown/Spectre/Foreshadow/L1TF/Plundervolt/RIDL/(etc).
<Bitweasil>
It's broken in Windows too.
<Bitweasil>
I don't actually *like* computers much anymore.
<Bitweasil>
I just like what I get paid to know them. :)
<bslsk05>
fedorapeople.org: Index of /groups/virt/virtio-win/direct-downloads/archive-virtio/virtio-win-0.1.171-1
<doug16k>
just open that iso in windows, right click install every driver install
<doug16k>
shut down, switch stuff over to virtio, turn it on, bingo
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<doug16k>
yes really far back
<doug16k>
tend to be several subdirs per os
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<doug16k>
the cool thing about those exact drivers is, they are signed properly by redhat and windows kernel doesn't mind loading it in 64 bit
<doug16k>
if it weren't for that you might as well build them from source
<geist2>
which i'm sure would take 10x as long just to get MSVC installed than actually compiling them
<doug16k>
ya I guess I was picturing cross compile from source :P
<geist2>
yah also possible i guess it can compile from mingw o whatnot. but theres some specialness with compiling kernel code for windows
<geist2>
dunno if gcc/etc has support for that
<doug16k>
it does
<doug16k>
it has funny /driver stuff in their special ld
<Arthuria>
In Windows kernel you could also disable code integrity to load your signed drivers, or just your own self signed cert to the root cert store (:
<doug16k>
yes but it ruins the fun when you have to destroy all security to use the guest :D
<doug16k>
before they locked down the kernel, it was ridiculous. 32 bit drivers hack the kernel almost like malware, hooking into things. it was getting bad
<doug16k>
legit drivers did exactly what malware does
<heat>
antivirus!
<heat>
like virus, but anti!
<doug16k>
that leaves us open for antiantivirus and antiantiantivirus if the 1st idea doesn't pan out
<Arthuria>
These issue still exist, but the attack vector has changed from hooking random things like SSDT, to hooking other WDM API related table. But then again when drivers can can r/w anywhere into system mem, all bets are off with security.
<doug16k>
imagine people were running a machine with some weird mix of badly written drivers patching a bunch of stuff in your kernel, then calling you for help to fix their blue screen?
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<jimbzy>
I can't imagine using Windows anymore.
<jimbzy>
I've heard it's gotten better, but so many bad times.
<sortie>
Same
<jimbzy>
I've been using Linux in preparation for switching to Sortix.
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<sortie>
Linux often makes me angry and instead of fixing the problems I just put all the frustrations into osdev where those classes of problems can't even exist
<doug16k>
they did make it fairly rock solid as far as kernel crashing over last 15 yrs
<doug16k>
comes down to how good your hardware choices were, what stupid drivers do you load
<jimbzy>
So it's like Linux in the 90's?
<doug16k>
when the driver is a binary and you can't do a thing, you get what you get
<doug16k>
pray for registry entry configurations to make it work right and turn off broken crap
* doug16k
waves at hardware encryption support on wlan
<jimbzy>
Wow. I accidentally set some objects in my game as RigidBodies instead of StaticBodies and when I hit run they slowly accelerated out of view.
<jimbzy>
It was kind of sad, actually.
<moon-child>
;o
<doug16k>
physics engine bugs are fun
<doug16k>
you could bump something end end up spinning 18000 rpm flying away from it at 9000m/s
<jimbzy>
Nah, the physics engine is pretty ok.
<jimbzy>
I've had multi-part characters break apart at the joints doing that, doug16k.
<doug16k>
haha, neat. my bootloader heap puts 0xBAD11111 in the size field of the header that is going out of existence
<jimbzy>
Hah
<doug16k>
in coalesce
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<heat>
i just found out azure VMs use a weird hyperv networking device instead of any other sane NIC
<heat>
because why sanity
<heat>
when you can write a new d r i v e r
<heat>
it's not even in PCI because why fucking not
<doug16k>
wow
<doug16k>
acpi detection?
<heat>
all they have in PCI is a 3 bridges, an IDE, and an hyperv vga adapter
<Arthuria>
I guess they have there own data passing methods betweens VMs, probably faster than PCI and PCI pass through if it's purely mem based?
<heat>
doug16k, weirder
<doug16k>
Arthuria, nic is just a bunch of dma. not much you can do to beat virtio or most nics
<doug16k>
nic driver is 85% "here's where to dma incoming packet into", "here, dma this out"
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<doug16k>
it already is shared memory based
<doug16k>
fancy server offload stuff can make nic do way more though
<Arthuria>
But for virtualization, I take it multiples levels of DMA may occur. VM1 DMA into some region, then VM2 has to move that data or DMA into where VM2 is expecting DMA for some driver. Multi level VMs may have lots of DMA levels though
<Arthuria>
So maybe there own custom method of passing data between VMs, ends up at the exact VMn DMA region. Just a theory, I don't know,
<doug16k>
I expect kvm to dma my guest's pages when I tx
<doug16k>
and rx
<doug16k>
host nic dma into guest pages
<doug16k>
how else would you do it?
<Arthuria>
That sounds right.
<doug16k>
I would be shocked if into buffer and memcpy'd
<doug16k>
nic is one click down from the simplest possible thing: a sound card
<doug16k>
sound card keeps streaming one ring forever. nic jumps around to different regions.
<doug16k>
it pretty much just shovels the bits into ram from ethernet port to dma rx buffer, and shovels bits from dma tx buffer to ethernet
<doug16k>
sequentially
<doug16k>
but it can jump to another place when this descriptor runs out
<doug16k>
it's almost hello world dma
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<doug16k>
er, hello dma world
<doug16k>
there are nics so simple it isn't even hello dma world. can't cross page boundary
<doug16k>
half decent dma hardware can be given a list of base,size ranges and it will go get the pieces and do one big thing with it
<doug16k>
need the pieces because of paging
<doug16k>
put it this way: I have scatter gather dma in my little toycore project sd controller I am making for a laugh on fpga
<doug16k>
real device has zero trouble implementing it
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<doug16k>
virtio is essentially a way to say "here send these memory regions to this channel" "put stuff coming from that channel here". devices are layered on top of that. nic device is basically that plus a mac address thing plus a multicast thing plus promiscuous mode
<heat>
all devices are essentially move memory to somewhere, or move something to memory
<heat>
except the GPU of course, that's moving memory + expensive calculator
<doug16k>
yeah, where atan per pixel is just fine
<doug16k>
if you showed a game dev from 1988 a modern shader they wouldn't believe it
<doug16k>
no amount of speed is enough for that
<jaevanko>
I wonder if we could afford to run Doom's renderer once per pixel
<jaevanko>
Maybe not at 1080p, but...
<Bitweasil>
With enough parallel processors, sure!
<Bitweasil>
<3 virtio, though.
<doug16k>
yeah virtio is great
<Bitweasil>
"You a hypervisor down there? Yeah, great, let's skip the whole 'pretending to be hardware' thing..."
<Bitweasil>
I think it's a good bit more secure than hardware emulation too.
<Bitweasil>
Some of the breakouts IIRC were in things like floppy controllers.
<Bitweasil>
(VM breakouts)
<jaevanko>
Bitweasil: You could do a lot with 2 million 486s :D
<Bitweasil>
Brown out the power grid, for sure.
<Bitweasil>
Hey, the way things are going, random 486s are going to be pushed back into production, if you can't get newer chips.
<Bitweasil>
The whole "Oh, yeah, the entire semiconductor industry is coming apart..." thing has been interesting to watch.
<doug16k>
I'd love to see a 5GHz 486 missing the 4K cache like crazy, would be fun
<jaevanko>
Can't get MCUs at work. Been a big pain
<Bitweasil>
"Memory? DRAM? You there? Please, can I have a byte? DRAM? Uh... hello?"
<Bitweasil>
jaevanko, I've seen a bunch of reports lately that things like SMT resistors/capacitors aren't available, voltage regulators are hard to find, etc.
<jaevanko>
Yeah, thankfully most things are still available in the 10-100 unit quantities that I need for /my/ job, but yeah
<heat>
i want a gpu pls
<jaevanko>
Don't we all :/
<Bitweasil>
You US based, and how old are you willing to tolerate? :)
<GreaseMonkey>
there's definitely been a shortage of the stuff needed in order to make PCBs lately
<doug16k>
brother picked up a 780 recently
<GreaseMonkey>
somehow we eventually got some PCBs through and shipped here though (NZ, not US)
<kc8apf>
Azure went down a path of using FPGAs as custom NICs with fancy offload capabilities. Not entirely surprised that has ramifications in presenting to guests.
<Bitweasil>
Woah, woah, a /780/? That's, like... what, $500?
<doug16k>
price wasn't good but no not that bad
<Bitweasil>
I've seriously debated selling a few of my old GPUs.
<Bitweasil>
They're going for stupid amounts lately.
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<doug16k>
yeah my brother got it for less than it would usually be
<heat>
when I get my build this september I'll probably go for something like a gt710 if there are no GPUs yet
<heat>
just pure video output, nothing else
<doug16k>
yeah if I were smart I'd sell 2060 super for a fortune
<doug16k>
use 1060
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<heat>
regular 2060s go for 600 euro/dollars
<Bitweasil>
Do it.
<Bitweasil>
If you don't use it...
<heat>
(if/when you find them / system integrators)
<doug16k>
it's the beginning of the end of gpu compute though
<Bitweasil>
In what ways?
<heat>
i'm hoping things get better these next months though
<Bitweasil>
There's more to GPU compute than just crypto...
<heat>
lets hope crypto crash and the vaccine lessens the shortages
<Bitweasil>
I think.
<doug16k>
they are crippling compute performance in next designs
<Bitweasil>
I believe that's only for Etherium and similar algorithms.
<Bitweasil>
Not "general purpose compute."
<Bitweasil>
Though I've not seen confirmation one way or another.
<heat>
yes
<Bitweasil>
Also, that's only nVidia.
<doug16k>
beginning of that arms race though
<heat>
they mention the hash rate
<doug16k>
they keep finding ways to trick the card into being useful again and they have to cripple it more
<heat>
last time they "tricked it" was because nvidia screwed up the driver
<heat>
this time it'll be in hardware
<jimbzy>
This time...it's personal.
<doug16k>
what about the next workload that is nothing but single precision muladd
<doug16k>
cripple that?
<doug16k>
whole thing is stupid
<heat>
doug16k: the only thing they want to cripple is ETH because it's literally the issue
<doug16k>
you aren't wrong, I'm saying ok what if there's another compute workload that is practically impossible to gimp, like muladd
<doug16k>
gimping some bitwise operation it's not a real solution
<heat>
*shrug*
<heat>
they might just want to gimp this time around since we have an actual shortage
<heat>
and there are no GPUs for non-hashing
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<doug16k>
must be nice to have so much demand that you are sitting at max production endlessly and come to the point of deliberately crippling your products to sour the milk enough to have availability go above zero
<doug16k>
like kicking out some customers and telling them they look stupid and don't come back, because there is too much of a queue at register
<klange>
picked up the kindle version of TCP/IP Illustrated volume 1 since my hardcover copy is... nearly 10,000 km away.
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<heat>
klange, cool book, neat!
<klange>
gonna do this shit right, and with ipv6
<heat>
doug16k: those same customers use the GPUs for non-GPU purposes and purposefully hoard them
<doug16k>
heat, yes, it's bad
<heat>
while people that need a single GPU can't get one
<heat>
especially when nvidia markets the GPUs for "gaming", not crypto/compute
<klange>
weirdly accurate statement: my hardcover copy is 8,265.71km away.
<doug16k>
there is supposed to be so much supply you can't keep up with that
<doug16k>
no matter how many you try to horde, manufacturer outproduces your ability to buy them
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<Arthuria>
Maybe Intel can release all there 14nm+++++++ in warehouses out to the world (:
<Arthuria>
silicon*
<heat>
they'll finally release their 7nm processors they've been hoarding for the apocalypse
<doug16k>
what they should do is make a specialized hashing accelerator that has some asics for some coins and put that in every card, and make it so it can do all hashing instructions in parallel all the way across all CUs
<heat>
did you really think intel couldn't make 7nm processors for all these years? lol
<doug16k>
in no time the hashing difficulty will be so high you cant use GPU
<Arthuria>
They only just got 10nm working in Tiger Lake, I don't think they've got 7nm solved yet ha
<heat>
doug16k, the coins would crash first
<doug16k>
just make the next nvidia card specialized entirely for eth and just meet current performance for rendering lol
<heat>
classic nvidia
<doug16k>
drop the raytrace and make that all hashing insns
<heat>
just coasting
<doug16k>
you can put out a fire by throwing gas on it, if you do it just right
<heat>
you can also just wait for the bubble to burst
<heat>
hilarious
<heat>
"what do you mean, the value will stop going up?"
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* gog
meows
<doug16k>
make it so game devs figure out ways to make their 3d shader more like a hashing algorithm so it can take advantage of the 4x issue bandwidth for hashing instructions :P