07:24 <borneoa___> karlp: stm32mp257f is dual ca35 with one cm33 and one cm0+. All the cores are accessible from the same JTAG/SWD port. So there is some flexibility to have cm0+ with JTAG. I don't know if this is one of the differences between cm0 and cm0+

10:03 <karlp> borneoa___: that's having the outer cores provide jtag with swd inside to talk to the m0 then.

10:04 <karlp> the m0 trm is "swd only"

10:04 <karlp> nominally, the dap is even optional :)

11:10 <borneoa___> karlp: the dap with the swj is provided by arm as a standalone block. Probably linked to an arm core by some license, but not directly HW connected to the core. Instead the small cm0 is usually in a single block with its dap, but my example above shows it can also be alone connected to a shared debug bus, behind a common dap

11:18 <karlp> sure. ok.