10:18 <gamiee> Hi, well, I am dealing with something very strange... again. After reset, when JTAG chain examination is being done, the ID code returned by chip is good. But after just resetting OpenOCD, when the JTAG chain examination runs again... The IDcode is different. Any ideas what this could be?

10:21 <antto> is it FF or 00?

10:24 <gamiee> Instead of 0x10000B6F, it's 0x04400000000

10:24 <gamiee> although, during scan, I notice that there is no IR update

10:25 <PaulFertser> gamiee: yes, after JTAG state machine reset the standard says IR should be pre-loaded with IDCODE instruction.

10:26 <gamiee> PaulFertser: it seems on T-Head cores this is not case. Else I do not know how to explain current behavior

10:26 <PaulFertser> gamiee: sometimes vendors do very odd things

10:27 <PaulFertser> gamiee: is it the same for you both with and without physical TRST?

10:27 <gamiee> PaulFertser: The chip (BL618) does not support physical TRST

10:28 <PaulFertser> OK

10:29 <PaulFertser> So OpenOCD should be doing TestLogicReset state transition then reading DR should be giving IDCODE if the hardware is sane.

10:32 <gamiee> I see OpenOCD is triggering TestLogicReset. But, hardware is not outputting the IDcode, but some garbage. (I am checking this with logic analyzer)

10:32 <PaulFertser> Heh https://adaptivesupport.amd.com/s/question/0D52E00006hpSoKSAU/idcode-reading?language=en_US

10:36 <PaulFertser> gamiee: otoh there's no standard IDCODE number, so OpenOCD can't know what to use there.

10:36 <gamiee> PaulFertser: exactly... sigh

10:38 <PaulFertser> So it's not like OpenOCD is not loading it on startup but loading after reset.

10:38 <PaulFertser> It has to count on the target in both cases.

10:40 <PaulFertser> And it should be all absolutely independent from CPU core etc.

10:41 <gamiee> I am going to check what CK-Link does

10:46 <gamiee> PaulFertser : Of course, first thing which CK-Link does is shift data to IR....

10:47 <gamiee> Question is, can I do something like that on OpenOCD?

10:47 <gamiee> I can override jtag_init I presume

10:54 <PaulFertser> gamiee: well, OpenOCD also does when it autodetects and verifies IR tap lengths on the chain.

11:00 <gamiee> PaulFertser : yeah... :/

11:01 <gamiee> one of options would be to override jtag_init, set IR code, and then run default jtag arp_init

11:01 <PaulFertser> gamiee: I see you're now forced to dig elbow deep into JTAG when all you wanted was OCD, heh.

11:01 <gamiee> PaulFertser : hahahaha yeah, seems there is no other way... :(

11:01 <PaulFertser> gamiee: but how can it be possible for OpenOCD to get the right codes after reset then?

11:02 <PaulFertser> Is full target reset pre-loading IDCODE while TLR does not, is that the difference?

11:02 <gamiee> PaulFertser : exactly what you said. Chip reset is pre-loading IDCODE into IR, but TLR does not.

11:03 <PaulFertser> Silly vendor :/

11:08 <gamiee> PaulFertser : it seems that vendor is T-Head

12:02 <gamiee> PaulFertser : Setting IR to IDCODE manually before solved the issue... sigh

12:14 <PaulFertser> gamiee: tricky :/ but well, at least this workaround works.

12:15 <gamiee> PaulFertser: yeah, but the workaround is kinda ugly honestly :(

12:15 <gamiee> https://paste.debian.net/1358676/

12:27 <PaulFertser> gamiee: irscan should be inside if too.

12:27 <PaulFertser> And runtest

12:27 <gamiee> PaulFertser: ah yeah, good note. This was just quick PoC. I wonder if Antonio or someone else will know better way of doing this. Will see

12:27 <PaulFertser> Well, ugly vendors require ugly configs.

12:28 <PaulFertser> If you document the weird story behind IDCODE preloading there in the comment I guess it should be fine.

12:31 <gamiee> PaulFertser: yeah ofc, will try to document it properly. Thanks :)

12:51 <borneoa___> gamiee: no, no suggestions for this

12:51 <gamiee> borneoa___ : oh, okay, then I will keep it this way. Thanks for the info :)

15:45 <gamiee> borneoa___ : thank you for the merge! I am super happy to see it upstreamed :)

17:11 <PaulFertser> Yay!

17:33 <borneoa___> gamiee: thanks to you for your contribution to OpenOCD

19:11 <marex> does openocd have any way to disable dcache on aarch64 ?

19:12 <marex> it should be some sctlr write ...