<florg>
Just end in "unable to connect to target" and if I hook my probe up to a logic analyzer it doesn't ever drive the CLK line
<PaulFertser>
florg: hey
<PaulFertser>
florg: please use some pastebin for pasting more than 2-3 lines next time
<PaulFertser>
florg: what kind of stlink do you have?
<PaulFertser>
florg: please pastebin full -d3 output along with the invocation command line
<florg>
PaulFertser https://pastebin.com/XnyebpdH - There you go. I'm using some stlink clone that works fine with the usual stm boards.
<Haohmaru>
i have the feeling he wanted you to run your normal command and just add "-d3" to it
<Haohmaru>
is the target chip not already "known" (supported) by openocd?
<florg>
I spent some time looking through and grepping through the existing targets but couldn't find any (couldn't find any targeting an Cortex M55/Armv8-M)
<Haohmaru>
nah, i mean particular chip, that includes the vendor stuff
<Haohmaru>
"cortex-M55" can be anything
<Haohmaru>
but i guess the answer is "nope"
<florg>
no unfortunately, it's a bit exotic (Alif Semiconductors)
<PaulFertser>
florg: ok, a clone shouldn't have limitations
<PaulFertser>
florg: " init mode failed (unable to connect to the target) " means SWD communication didn't happen.
<PaulFertser>
florg: but I'm almost sure you should have seen something on SWCLK
<PaulFertser>
Check your capturing setup.
<Haohmaru>
or wrong cabling? short somewhere? maybe disconnect the SWD from the actual target (but not from the $scope) and see if the SWD signals from the debugger alone look "okay"
<PaulFertser>
florg: hm, probably you should be using stlink-dap.cfg there because you specify dap-level target config.
<PaulFertser>
Yes, and what Haohmaru says
<florg>
you were right with the SWCLK, I probably had some loose cables before, now I see it with the LA. The signal look alright.
<florg>
Changing to stlink-dap.cfg doesn't solve it unfortunately, still unable to connect. I'll soon have a blackmagicprobe to try it with. My hope is that JTAG works with less headaches
<Haohmaru>
my impression was that "SWD" is "nicer" for Cortex-M
<florg>
;( My guess is that there is some problem in switching from JTAG to SWD mode
<florg>
or the devboard I've got is just fucked
<Haohmaru>
hm, you should check the chip's datasheet about the program/debug port, the pins, and anything related
<Haohmaru>
if it has both "jtag" and "swd" there may be some funky gotchas going on
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<borneoa___>
Too late to reply to florg, already moved away. Stlink does not support adiv6. But it should print an error msg for that. I will verify the msg tomorrow.
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