18:51 <NishanthMenon> just wondering if any one has ideas.. https://github.com/openocd-org/openocd/blob/b388f4805c3ce6e0b7ce7e5995c9305529db8e46/src/target/cortex_m.c#L1747 -> as far as I know this hardcoded value has been there for really long time. any idea about why 50ms?

18:56 <PaulFertser> NishanthMenon: hey :) do you know git blame?

18:57 <NishanthMenon> PaulFertser: yes ;) at least tracked it down to 3f8f5839641f target: rename cortex_m3.[ch] to cortex_m.[ch] (2011) :) -> so it is older than that..

18:57 <PaulFertser> Wow, it really was added in 09883194f86725f4eae7e6db9eabcf6b3d1511de by Dominic himself.

18:58 <PaulFertser> In 2007 :)

18:58 <NishanthMenon> jeez

18:58 <PaulFertser> git blame 02cd1e39cc^ -- cortex_m.c

19:00 <NishanthMenon> aah thanks.. did'nt know that :D

19:00 <antto> is it like a "this should be a well-chosen constant, but i don't know what right now, so i'll just temporarily put 50... just temporarily!"

19:02 <NishanthMenon> heh.. kinda curious with sys_reset how folks get past ROM and crystal stabilization delays to get cpu to halt.. :D I was going to play around with this a bit, but wanted to be sure i was'nt going against some "thou shalt not toucheth this val" that i could'nt see clearly..

19:03 <NishanthMenon> anyways, thanks folks..

19:04 <PaulFertser> NishanthMenon: normal way on cortex_m is to setup a vector catch on reset handler, then trigger reset by any means other than power on reset.

19:04 <PaulFertser> A proper cortex_m target doesn't reset debug unit

19:05 <PaulFertser> Good target shouldn't mind stopping in ROM...

19:06 <NishanthMenon> PaulFertser: apparently if i read https://github.com/openocd-org/openocd/blob/b388f4805c3ce6e0b7ce7e5995c9305529db8e46/doc/openocd.texi#L10627 vectreset is not for m0 ?

19:06 <PaulFertser> NishanthMenon: vectreset is mostly irrelevant because only old broken cortex-m targets didn't support sysresetreq.

19:07 <PaulFertser> Vectreset is not vector catch mechanism.

19:07 <NishanthMenon> aah

19:09 <NishanthMenon> i did manage to get things working https://github.com/nmenon/openocd/commit/590609c64834b0bc206b7225d8497246a395676a#diff-10226b4da388fb8e117d390a9c9fe0cbab48c6f750ad68e011fc3e27cdd03a2aR96 -> but real ugly. messing with ocd_process_reset_inner would mean my reset halt would'nt work OR my factory commands would'nt work and I could'nt have both at the same time.. still not happy with the soln.. trying to see if there is a

19:09 <NishanthMenon> WAIT_IN_DEBUG that the h/w folks have provided..

19:11 <PaulFertser> Oh my

19:11 <NishanthMenon> :( yeah, I know.. i weep at my own code :(

19:12 <PaulFertser> Why your chip engineers just do not allow stopping in ROM?..

19:13 <NishanthMenon> they seem to have documented the option - but does'nt seem to work for me at least. I looked at the TI "CCS" -> from what I see they did'nt seem to have bothered with it either..

19:14 <NishanthMenon> I think some security folks might have gone a bit bonkers.. or something I suspect.. dunno how to get it right atm..

19:17 <PaulFertser> :/