<merethan>
Haohmaru referred me to you for hints on how to use OpenOCD on a device with two heterogeneous cores (M4 & M0+)
<PaulFertser>
merethan: I'm not exactly the expert on that topic, I know general stuff. If it's not SMP then you just get two different GDB ports, for each target.
<PaulFertser>
As for the telnet interface, you can switch the currently selected target with "targets" command (I know, it sounds confusing).
<merethan>
Yes, but the trickery to make that work requires some reading on my part, but I not found suitable reading yet.
<merethan>
(on making two GDB ports)
<PaulFertser>
merethan: no trickery needed, you just define two targets in the config and GDB ports are allocated automatically one by one.
<PaulFertser>
The very first gets 3333, the next 3334 etc.
<merethan>
Yeah, but how to just do that.
<PaulFertser>
merethan: how to define several targets? Do they share DAP?
<merethan>
It's probably simple but if you not know the lingo one cannot search for it using a search engine.
<merethan>
Bit like Orwells newspeak: Hard to think of something when the words no longer exist.
<PaulFertser>
merethan: there's "toki pona" language created specifically to have very few words exist. Some claim it's beneficial for reasoning about certain things :)
<PaulFertser>
merethan: let's approach this from the bottom up. What debug interface is available on this target?
<PaulFertser>
Is it JTAG or SWD?
<merethan>
In that case I need know a thing to fix my thing. Can you help me find the thing?
<merethan>
Or maybe the other thing :P
<Haohmaru>
it has a debug thing for sure
<merethan>
Ah yes that thing!
<merethan>
It's SWD using a ST-Link V3.
<Haohmaru>
so your debugger is an stlink v3
<merethan>
Yes
<Haohmaru>
and the chip has SWD wired to it
<merethan>
Yes
<PaulFertser>
merethan: ok, and do you have some datasheet which shows debug ports inside the chip and how they're connected?
<merethan>
It all works. I just for the life of me can't find anywhere what the name of the register is where the NVIC sets bits to enable you read which it was.
<PaulFertser>
merethan: the ISR number is easy, you can use the GDB script I mentioned.
<merethan>
Can I please just read a register and see which bit is set?
<merethan>
I try remember as hard as I can, but sometimes even trivial things escape my mind.
<PaulFertser>
merethan: yes, read ICSR
<PaulFertser>
The lowest bits there are the exception number.
<PaulFertser>
merethan: so about multiple targets, you probably want to know what APs they're on, if they share one or if they're on different ones. Info might be available in "dap info 0", "dap info 1" etc. OpenOCD commands.
<PaulFertser>
Then you can define several cortex_m targets as e.g. stm32mp15x.cfg does.
<PaulFertser>
I have to go now, see you in the evening.
<merethan>
okidoki!
<merethan>
I'm probably gone soon too, can barely keep my eyes open. I'm in desperate need of sleep.
<merethan>
wot. HardFault & BusFault
<merethan>
Whilst trying to execute the list in between __preinit_array_start & __preinit_array_end
<merethan>
My bad __init_array_start & __init_array_end. Hard to concentrate for me now.
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<PaulFertser>
merethan: back
<PaulFertser>
merethan: probably wrong stack pointer past the RAM?
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<karlp>
that sort of crash sounds very much like "I set my ram too long in my linker script" :)
<karlp>
but yeah, "vecstate" is useful
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