08:09 <drath42> I'm seeing segfaults whenever my Cortex-A53 (i.MX 8M Plus) target goes through resets. The segfault is in mem_ap_read_u32 (via target_poll), because the debug_ap is NULL at that point.

08:12 <drath42> Before that, polling failed once (Polling target imx8mp.a53.0 failed, trying to reexamine), and in aarch64_examine_first the debug_ap was set to NULL.

08:13 <drath42> That aarch64_examine_first failed (Could not find APB-AP for debug access)

08:13 <drath42> last log output at -d3 is "Examination failed, GDB will be halted. Polling again in 100ms"

08:14 <drath42> I guess there are multiple things going wrong:

08:15 <drath42> - the target is being re-examined while the JTAG chain isn't working

08:17 <drath42> - the next target poll tries to access the target even though it hasn't been (re-examined)

08:18 <drath42> - the code tries to read from the AP even though it isn't set (NULL)

08:19 <drath42> What I'm not sure is how this is supposed to be handled, i.e. at which level this should be caught, and how this could be handled gracefully

08:20 <drath42> I'm using board/imx8mp-evk.cfg and interface/ftdi/imx8mp-evk.cfg

11:55 <hanetzer> patching pycortexmdebug to support derivedFrom registers :)

12:36 <hanetzer> and *done*