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<pdgendt>
hi, I have an ATMEGA128 sitting in a daisy chain, and this controller has a JTAG bug: The JTAG instruction IDCODE is not working correctly. Data to succeeding devices are
<pdgendt>
replaced by all-ones during Update-DR.
<pdgendt>
How can I configure openocd to skip the IDCODE test or to do it manually?
<PaulFertser>
pdgendt: hm, does OpenOCD actually stop if idcode doesn't match?
<PaulFertser>
pdgendt: I think it reports a warning and carries on.
<pdgendt>
ok, and how would I proceed to try and flash the device?
<pdgendt>
if I try "reset halt" I get: JTAG scan chain interrogation failed: all zeroes
<PaulFertser>
pdgendt: what are the other devices in the chain?
<pdgendt>
an ATMEGA128 and an ATMEGA1284p
<pdgendt>
I use the sysfsgpio driver
<PaulFertser>
pdgendt: I think you probably do not need "reset halt" to try flashing either.
<PaulFertser>
pdgendt: OpenOCD doesn't really support debug of AVRs, only flashing, so there's no real reset or target state handling.
<pdgendt>
ok, flashing is the only thing I need, so that's fine
<PaulFertser>
Target state is always returned as halted anyway.
<pdgendt>
but if I try to read for example it says the Device ID and manufacturer IDs are all zero
<PaulFertser>
pdgendt: to read using what command?
<pdgendt>
flash read_bank
<PaulFertser>
pdgendt: not sure that's really supported. Can you try flashing right away?
<pdgendt>
well, I did add some code which I found on gerrit (not merged) were support for eeprom and fuses was added, so it could be that I have a different code base atm
<pdgendt>
but it works if I have a single device on the jtag chain
<PaulFertser>
pdgendt: reading doesn't seem to be supported at all anyway.
<pdgendt>
I have added write_bank/read_bank/verify_bank for flash/eeprom/fuses
<PaulFertser>
pdgendt: when OpenOCD talks to a device in the chain it loads BYPASS instruction in all other devices.
<PaulFertser>
pdgendt: is it possible you specify wrong IR length in your target configs?
<pdgendt>
I doubt that, again it works with a single atmega1284p but on another board we have an atmega128+atmega1284p
<PaulFertser>
pdgendt: wrong IR length might work for a single device on the chain.
<pdgendt>
PaulFertser: it could be that my reset pin is inversed on the board, I will verify this first
<PaulFertser>
pdgendt: yes, looks like no communication takes place at all
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<pdgendt>
PaulFertser: I did have some pins misconfigured, now I do get some response from the controllers. One question though, the chip ID has some version bits, is there a way to ignore this part of the ID?
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<PaulFertser>
pdgendt: what part of openocd complains?