01:28 <rue_shop2> hey

01:29 <rue_shop2> I had a it-was-not-an-oops-it-should-have-been-fine and now need to use a ft232H cable to reset the fuses on an atmega3290P

01:29 <rue_shop2> can anyone guide me a bit?

01:29 <rue_shop2> oh, via jtag

01:44 <rue_shop2> oh no, no power adatapter

05:41 <PaulFertser> rue_shop2: last time I checked OpenOCD could only program flash and probably eeprom on atmegas.

05:42 <PaulFertser> rue_shop2: don't you have an SPI device for them?

05:44 <PaulFertser> rue_shop2: hm, I think you can use the ft232h JTAG adapter to connect it to the SPI ISP and avrdude should support it with -c 2232HIO.

05:46 <PaulFertser> rue_shop2: TMS pin should be connected to target's reset.

05:47 <PaulFertser> rue_shop2: some avr parts have ISP SPI on PDI/PDO pins, some on regular SPI, you should check the datasheet.

07:22 <rue_shop2> PaulFertser, I lost the system clock, I cant use spi

07:22 <rue_shop2> something strange went wrong, I cant even inject a clock

07:22 <rue_shop2> so spi is't an option

07:23 <rue_shop2> when I use xc3sprog, I can ID the chip

07:23 <rue_shop2> but I cant get a jtagice via avrdude to

07:31 <PaulFertser> rue_shop2: idk about atmega3290p specifically but with all the other atmegas I had with default fuses SPI was always available, and the worst you could get it was that it required external clock (and it can be rather low).

07:31 <PaulFertser> And SPI wasn't possible to disable via SPI.

07:59 <rue_shop2> I know

07:59 <rue_shop2> but for whatever reason the spi will not respond and I need to reset the fuses

08:06 <PaulFertser> How were the fuses modified in the first place? Using what interface and tool?

09:45 <antto> isn't that atmega one of the pseudo-xmegas?

09:45 <antto> aka UPDI

09:47 <antto> hm, maybe not

09:53 <urja> it's an older LCD-driving atmega

09:54 <urja> havent looked at it before, just remember the number as a "weird one" :P

10:11 <antto> now there's even dumber chip names thanks to microsh*t >:/

10:11 <antto> they started applying their pic-like naming scheme

18:26 <diddly> hello, a colleague is looking to replace a xilinx dlc10 programmer which is being a pain to support with something more open. I'm not sure the target chip, or if they are using spi/jtag/other, but does anyone use xilinx with openocd and can suggest something to look into?

18:36 <PaulFertser> diddly: hi

18:36 <PaulFertser> diddly: I'm afraid the question is a bit too vague

18:43 <cyrozap> diddly: Yes, I've used it to load bitstreams into Spartan-6 and 7-series FPGAs, and to program the flash on some Spartan-6 devices (using the SPI proxy bistream), all over JTAG.

18:44 <cyrozap> Not sure what you mean by "something to look into", though--do you mean instructions on how to get that set up?

18:46 <cyrozap> Also, knowing what the target chip is and what interface they're programming it over would be good to know before asking questions about it--OpenOCD only interacts with the FPGAs over JTAG, and loads a pre-built bitstream in order to talk to the SPI flash connected to the FPGA.

19:36 <extor> * You have been kicked from #openfpga by ChanServ (Invite only channel)

19:36 <extor> Not very open on libera is it

19:39 <PaulFertser> Guess that's the channel policy rather than anything to do with the network itself.

19:41 <extor> I'm not even sure there is an open source fpga yet, or even cpld. Lattice processors are proprietery.

19:42 <PaulFertser> extor: you mean some ASIC with all the design documents freely available?

19:43 <clever> extor: its ##openfpga

19:49 <extor> THanks clever

19:50 <extor> Yes PaulFertser afaik we don't have something like an arduino for fpgas or perhaps we do with I think the arduino something 4000 fpga dev board but it is not popular.

19:51 <PaulFertser> extor: what do you mean, I can't see your point at all?

19:51 <extor> Sad because it seems these days almost all EE 101 classes are using fpgas rather than breadboards and 555 chips for their introductory labs

19:51 <PaulFertser> extor: there're some FPGAs supported by fully free software toolchains.

19:51 <PaulFertser> extor: so you get ice40 and use free software toolchain with it, what's the problem?

19:52 <extor> PaulFertser, yes like the lattice 40 but the CPU itself is not open source and the price actually doubled in the last few years. You used to be able to get a lattice 40 for $20 if I recall

19:52 <PaulFertser> extor: arduino is using closed-source atmega too.

19:52 <extor> It's not really that much of a problem except the ice40 is minimum $50 to aquire today while 3 years ago it was $20

19:53 <extor> Whilst ironically you can buy $25 ZYNQ boards(repurposed from bitcoin miners) on ebay labeled as development boards.

19:53 <extor> Search ebaz4205 on aliexpress or ebay

19:54 <PaulFertser> Yep

19:54 <extor> I just find it a bit annoying that an fpga with 4 times the power as an ice 40 is sold for half the price

19:54 <PaulFertser> Is it supported by free software tools btw?

19:54 <extor> Sad that there is no free programming software for xilinx or intel/altera fpgas yet

19:55 <extor> No I dont think Xilinx is supported by open source

19:55 <PaulFertser> extor: ahem?

19:56 <extor> I mean, you can use command line sorcery to set it up and even utilize the embedded ARM in their SoC and reqrite the bootloader since its U-boot but you cannot send code to the reprogrammable grid using open source afaik

19:57 <extor> You need to download Vivado/Vitis to even set up a 55 equivalent circuit on the spartan part of the SoC

19:57 <extor> I could be wrong though since I've only reached the setup part on my antminer control boards

19:57 <PaulFertser> https://symbiflow.github.io/ supports Xilinx 7 series

20:00 <extor> Oh nice. I'm trying to see if they do Zynq besides the obvious Arty 7 series

20:01 <extor> On page 56 it says it does, vaguely https://readthedocs.org/projects/prjxray/downloads/pdf/latest/

20:02 <mschwingen> Hi - how do I contact openocd gerrit admins? It seems I have problems with mixed accounts/email addresses, and can't find contact infos ...

20:03 <PaulFertser> mschwingen: I'm the one, hello.

20:03 <PaulFertser> mschwingen: I was sending mails about it to the mailing list

20:03 <mschwingen> I was not sure - i only archive vera few mails, and could not find it in the archives at a quick glance.

20:04 <PaulFertser> It was recent, we had a massive upgrade.

20:04 <PaulFertser> Feel free to /pm me here

20:04 <PaulFertser> Let's do some quick interactive session.