_florent_ changed the topic of #litex to: LiteX FPGA SoC builder and Cores / Github : https://github.com/enjoy-digital, https://github.com/litex-hub / Logs: https://libera.irclog.whitequark.org/litex
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<Flea86> Hello. New Litex user (via Ubuntu under WSL2) here. Question: Anyone else having issues generating a custom netlist for the usb_ohci.py peripheral? sbt seems to throw an error 'Expected ID Character' when I attempt to increase the number of usb host ports beyond one. Suspect this may have worked previously for others, so it could be a new issue or just my own personal hell :) Thanks in advance.
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* cr1901 needs to bring his LiteX up to date... I've never heard of that error
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<Flea86> cr1901: Thanks for your comment. I had no problems extending vexriscv-smp to dualcore so I'm currently at a loss to explain.