mmind00 changed the topic of #linux-rockchip to: Rockchip development discussion | public log at https://libera.irclog.whitequark.org/linux-rockchip
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<naoki> mmind00: is "CONFIG_ROCKCHIP_SPI=y" required for u-boot for ROCK 5 ITX?
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<naoki> hmm, emmc(sdhci) related driver should be removed, but sdmmc related driver should not be removed...
<naoki> I'll make v4 tomorrow
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<qschulz> naoki: re: spi on rock 5 itx. The PMIC is on SPI, so if you want to be able to control stuff on the PMIC, we probably should have it, yes
<qschulz> is there an issue with enabling SPI controller on that board?
<naoki> qschulz: CONFIG_ROCKCHIP_SPI is for SPI NOR flash for older RK SoC
<qschulz> naoki: pretty sure that isn't true as I had to fix that driver for RK806 PMIC support ;)
<naoki> oh
<naoki> sorry, I was confused
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<qschulz> naoki: there are actually different IPs now in Rockchip's SoCs
<qschulz> the "typical" SPI controllers are using the old IP back from RK3066 according to the compatible string
<qschulz> but there is also another kind of SPI controller called SFC which is a different IP and is used typically for SPI flashes as it can go much faster than that old IP (limited to 50MHz)
<naoki> my question may be "why is CONFIG_ROCKCHIP_SPI=y not specified for (some RK3588 based board with SPI PMIC)"
<naoki> I need to check my working branch first ;)
<diederik> because that kernel module doesn't exist?
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<diederik> (at least in the upstream kernel)
<qschulz> naoki: could be a simple oversight, maybe we should imply that one on CONFIG_ROCKCHIP_RK3588 level
<naoki> I cannot remember but there is a board which uses I2C PMIC
<qschulz> naoki: one that is already upstreamed?
<qschulz> also, imply means you can disable it
<qschulz> git grep -B20 rk806 dts/upstream/src/arm64/rockchip/rk3588* | grep i2c
<qschulz> returns nothing today
<qschulz> naoki: but the RK806 has an I2C variant indeed
<qschulz> not sure U-Boot or the kernel supports it at the moment
<qschulz> IIRC I tried to make the changes for that minimal, IIRC that should be as simple as adding a compatible and voila
<naoki> it seems my memory is corrupted ;)
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<qschulz> naoki: maybe don't ping people on a patch you send a new version for 3 hours later :) ?
<qschulz> my comments remain the same for v3 though
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<naoki> qschulz: yeah... sorry ;)
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<sre> qschulz: Support for the I2C version of RK806 got added in 6fc9bb82a3ef (6.12)
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<qschulz> sre: ah, so RK3576 boards use I2C :)
<qschulz> wondering what made them have SPI on RK3588 and I2C on RK3576 :
<qschulz> :)
<sre> well usually all the board vendors copy the evaluation board design :)
<qschulz> I know, why did Rockchip made a different design for RK3588, and then RK3576 is back to the old days
<qschulz> in U-boot, it's possible that RK806 on I2C will just magically work without patches
<sre> One difference is, that RK3588 needs more regulators than RK3576. The RK3588 boards either use two RK806 or one RK806 and a few extra I2C regulators.
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<sre> But it might just have been an experiment from Rockchip.
<qschulz> yeah but how does that make it better to use SPI over I2C :)
<qschulz> (not a question for you :) )
<sre> Usually with SPI you can use higher bus speed. Could be that they wanted to experiment with this for faster frequency scaling?
<sre> Personally I was more amused by them having a rk8602 and an rk8603 with the only known difference being their I2C address.
<qschulz> that's not that uncommon though?
<qschulz> allows to have them both on the same i2c bus
<qschulz> I guess they could have had a bootstrap pin instead?
<qschulz> sre: seeing a lot of work on RK3576 in mainline Linux from you folks, not much sent for RK3576 by anyone in the community yet though
<qschulz> quite surprised (well, priorities :) )
<sre> For RK3588 they actually need three I2C regulators when only a single RK806 is used. Apparently they did not want to create an rk8604 and do use a second bus for the third I2C regulator.
<qschulz> sre: interesting!
<sre> I would have expected a bootstrap pin, which means they only need to produce one silicon version and can easily support 3 chip addresses (tied to ground, tied to vcc, and open)
<qschulz> sre: I guess you could have some chicken and the egg problem though
<qschulz> and "difficult" timings
<qschulz> as you need power to pull the line high before you actually power the regulator
<qschulz> on our designs we actually have 2x RK8602 and 1x RK8603, so necessarily two I2C busses... is there an RK8601 we missed maybe
<sre> 2x RK8602 and 1x RK8603 is the reference design when using a single RK806. I don't think there is an RK8601.
<qschulz> oh they do exist, but different from rk8602/rk8603 according to Cristian
<qschulz> RK8600/RK8601 are fully compatible with the FAN53555 regulators.
<qschulz> naming stuff consistenly really is difficult for engineers, not only SW ones but HW ones as well it seem
<qschulz> s
<sre> regarding the timings for a bootstrap pin - the regulator needs power anyways to be functional. There should be some kind of brownout detection for the I2C side, which can be reused for sampling the bootstrap pin.
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<Kwiboo> qschulz: re rk3576 from anyone in the community, I do not think TRM for rk3576 is shared/leaked in "public" yet ?
<qschulz> Kwiboo: which part of the TRM?
<qschulz> Kwiboo: true, I was certain I had my hands on the part1 of the TRM
<Kwiboo> qschulz: any part of TRM, I have only seen a datasheet for rk3576 and nothing else :-)
<tlwoerner> if a board has more than 1 PWM, is it possible to sync the PWMs so their operation is linked?
<tlwoerner> i'm looking at the rock-pi-s (rk3308) specifically
<tlwoerner> (if that matters)
<qschulz> tlwoerner: what are you trying to achieve here?
<qschulz> Kwiboo: well, yes. Let's see how long it takes before stuff gets leaked ;)
<tlwoerner> qschulz: i'm using 2 PWMs to drive the separate inputs of an H-bridge and would like to have the two PWMs sync'ed
<tlwoerner> i.e. when one is 1 the other is 0 and vica versa
<sre> FWIW we could start a little bit earlier with the RK3576, since we got one Sige5 board early. Upstreaming goes quickly because most IP is very similar to RK3588 :)
<qschulz> sre: that's what I've been told yes :)
<qschulz> hopefully that is true :)
<tlwoerner> the hardware i'm using, thankfully, is smart enough to guard against destroying itself if both are 1 at the same time (by turning off) which causes occasional glitches that would be nice to avoid
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<qschulz> tlwoerner: I think you'd need the exact same clock to be used for both controllers and invert the signal on one?
<tlwoerner> yea, that's what i was assuming. i was hoping there was some way to coordinate the controllers themselves
<tlwoerner> maybe if i look at the soc manual maybe there's an option for it
<qschulz> tlwoerner: that would be a HW feature I assume
<tlwoerner> or maybe it's something generic linux knows how to do
<qschulz> i don't think this is something any SW would be able to do
<qschulz> i mean, it depends on your margin of error
<qschulz> but controlling two different controllers via two different drivers...
<qschulz> it won't happen at the same time very likely
<qschulz> for sure not at the instruction level :)
<qschulz> tlwoerner: pwm0, 1 and 2 on RK3308 have the same parents
<qschulz> mux_dpll_vpll0_xin24m_p
<qschulz> sooooo, maybe if you set the proper parent and use the same duty cycle+frequency
<qschulz> and hope everything is stable enough to not have too much overlap between both...
<qschulz> if you need something able to switch both really quickly, I guess a simple driver taking two PWM controllers could help
<qschulz> but essentially if sys/kernel/debug/clk/clk_summary returns the same parent aand the same rate for sclk_pwm[012]
<qschulz> and baring the initial setup glitches from userspace
<qschulz> maybe that would work?
<qschulz> tlwoerner: wait
<qschulz> there are multiple channels per PWM controller!
<tlwoerner> if i figure out how to use 1 PWM, inverted and non-inverted, to drive 1 bridge, then i can use 1 PWM per bridge
<tlwoerner> but if i keep going the same way i am now, then i'll need 2 PWMs to drive 1 H-bridge
<tlwoerner> qschulz: what does that mean? how would i split out 2 channels?
<qschulz> tlwoerner: well... now I'm confused, what's the usecase for multiple channels if there's only one output pin per PWM controller?
<qschulz> (I mean generally)
<qschulz> Configuring the same duty cycle and frequency shouldn't be an issue I guess
<qschulz> the issue would be the timing
<qschulz> you'd anyway need to do at least two register writes from two different drivers
<qschulz> so no guarantee the signals would be synced
<qschulz> I guess an option could be to have something that cuts the PWM signals externally
<qschulz> no, nvm
<qschulz> a signal inverter is the solution :D
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<tlwoerner> ...and now you're all caught up, haha
<tlwoerner> if there was a (hardware) way of sync'ing the two i'd be all set, hence my original question
<tlwoerner> but i'll explore using 1 PWM pin for both waves. like i said, it would split my requirements in half
<tlwoerner> meaning i could do 1 device for each PWM, instead of needing 2 PWMs for each device
<tlwoerner> i better get cracking on learning verilog, then i could create my own controllers
<tlwoerner> if anyone from rockchip is listening, in the future i'm going to need rockchip SoCs that come with fpga fabric :-D
<tlwoerner> preferably fpgas i can program with open-source tooling
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<diederik> nvm, false alarm. It's in GKH's tty-next branch
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