<rogandawes[m]>
that with no changes at all to the jumper wires
<rogandawes[m]>
I presume (pins A0:A7 must be connected to B0:B7) means A0 is connected to B0, etc?
<rogandawes[m]>
Do the grounds also need to be connected?
<rogandawes[m]>
Connecting the grounds made no difference.
<rogandawes[m]>
So, question: Does "mode <test> is broken on device revision C3" mean that the hardware is unable to support the test, or that the selftest applet needs to be updated to support the hardware?
<rogandawes[m]>
esden (@_discord_269693955338141697:catircservices.org) whitequark (@_discord_182174208896401419:catircservices.org) Is there some debugging I can do to figure out what is wrong with my board? I am getting variable results on the pin-loop selftest.
<q3k[cis]>
i see i'm not the first person to say this...
<q3k[cis]>
but yeah, if the developers say "selftest is completely broken on revC" then i would trust them
<q3k[cis]>
do you have any other reason to believe there's issues with your board?
<rogandawes[m]>
Well, there is no reason to believe that the pins-loop test is broken, but it still gives erratic results, as shown. That is something that should be easily testable, I would think, not relying on the internal wiring of the level shifters etc to be able to determine whether any pins are non-functional. Drive a line on port A high/low, check whether it follows on port B, and vice versa. I assume this is what is being done, at any rate.
<q3k[cis]>
what do you mean there's no reason to believe? there's a github thread above with the explicit message from one of the devs saying it's broken
<rogandawes[m]>
But other than that, yes, I do have reason to believe that there are problems with my board. I am trying to JTAG an i.MX28-based board, but the jtag-probe applet firstly failed to detect the target voltage, and even when it was specified to be 3.3V, failed to identify any JTAG pins.
<rogandawes[m]>
the pins-LOOP test?
<rogandawes[m]>
I don't think that was called out as broken?
<rogandawes[m]>
pin-int and pins-ext, yes
<q3k[cis]>
supposedly all of selftest :)
<rogandawes[m]>
but if it is broken, it doesn't emit the same message when actually running that subtest as the others do.
<q3k[cis]>
also fwiw i remember having similar issues with that test when manufacturing my own glasgow, while also having no other issues in practice
<q3k[cis]>
and i also remember it being unstable
<rogandawes[m]>
I see. Thanks for that. Perhaps I need to go back and recheck what I was doing then. I figured I would start with the basics, and a self-test seemed like the first thing to try.
<rogandawes[m]>
btw, nice talk at CCC, good luck with your legal battles!
<q3k[cis]>
otoh i just ran pins-loop on my prod glasgow and that seems to pass, so hard to say conclusively
<q3k[cis]>
> but the jtag-probe applet firstly failed to detect the target voltage
<q3k[cis]>
did you connect S?
<rogandawes[m]>
yes, the red wire
<q3k[cis]>
red is V, not S
<q3k[cis]>
(at least on my wire harness)
<q3k[cis]>
if you want the glasgow to follow some external voltage for I/O, you use -M and connect the S wire
<rogandawes[m]>
hmm, seems i was misled by a blog post i "red"
<q3k[cis]>
if you want the glasgow to run at a concrete voltage for I/O, use -V 21.37, and then connect the V wire if you'd like to also power the circuit from it
remexre has quit [Ping timeout: 246 seconds]
<q3k[cis]>
rogandawes: also, just to check - for pins-loop you've connected A0 to B0, etc? not A0 to B7
<rogandawes[m]>
Yes
<rogandawes[m]>
At least using the blue wire it is now sensing voltage, thank you for that pointer.
<rogandawes[m]>
still fails to detect the JTAG interface that I know is there, and have been using with an FTDI232H-based adapter.
<q3k[cis]>
rogandawes: could you send a photo of your setup?
<Attie[m]>
can you use something with less ads / popups?
<rogandawes[m]>
I also have a logic analyser tapping the signals (yellow wires) to see what is actually happening, shown in the last image. However, the results are the same regardless of whether the LA is connected or not.
<rogandawes[m]>
oh, sorry 🤦 I have an adblocker, so didn't see any.
<Attie[m]>
ha (I'm on mobile)
<Attie[m]>
are you confident that the JTAG is actually active? (not disabled), and that your wiring through the series of adapters is correct?
<Attie[m]>
[sorry, was more of a request for next time]
<rogandawes[m]>
Yes, it is a real product, it is a Home Automation hub, branded Wink Hub. This is v1, based on an i.mx28, I also have v2, based on an i.mx6UL that I am trying to hack on.
<rogandawes[m]>
I'm fairly confident that the wiring is ok. The adapter board is just a pitch adapter, the wires run straight through without any additional active or passive components. I mean, it is entirely probable that the wires don't match up to anything specific (i.e. pin 1 to TDI, etc), but that's the point of using the jtag-pinout applet 🙂
<Attie[m]>
fair enough(!)
<Attie[m]>
what's the command line you're using?
<rogandawes[m]>
I *do* have a derived pinout for the board, which someone reversed using hi res images, gimp, etc, etc, and this has been "working" using my FT232H-based dongle until now. The problem is that I have been unable to get reliable halt (apparently because I also don't have reliable SRST(!), which is why I am using the logic analyser now to try and watch what is actually happening. At least the LA trace shows the SRST pin actually toggling,
<rogandawes[m]>
which I was unable to achieve with the FT232H!
<rogandawes[m]>
glasgow run jtag-pinout --port A --pins-jtag 0,1,2,3,4,5,6,7 -M
<Attie[m]>
intriguing... I just scrolled further back and saw your pins-loop results... perhaps worth resolving that first
<rogandawes[m]>
How? What can I do?
<Attie[m]>
it should indeed be A0 -> B0, etc... grounds don't need connecting (the I/Os aren't isolated)
<Attie[m]>
I used a keyed IDC & ribbon cable I had on hand, bit dupont style jumpers should be fine
<Attie[m]>
I'm a little confused that the results weren't stable(?!)
<rogandawes[m]>
I guess it was a problem with the jumper wires I was using previously?
<rogandawes[m]>
I used the Glasgow wiring harness in port A, and hooked the other ends to Port B, and now it is passing.
<rogandawes[m]>
Cheap Aliexpress jumpers, I guess!
<Attie[m]>
oh, great!
<rogandawes[m]>
Just tried cutting out the additional ribbon cable and Logic Analyser conections, shortening the assembly. Same result.
<rogandawes[m]>
Actually, NOT same result. This time it identifies A7 as LOW, which it didn't previously
<rogandawes[m]>
but still no JTAG interface detected
<Attie[m]>
I'd be tempted to use `-V 3.3` (if that's correct, so it doesn't pick 3.4v), and try giving it the pin map according to the post you linked(?)
<Attie[m]>
I don't remember the applet's procedure, but the trace you shared doesn't look quite as I'd expect
<Attie[m]>
🤔
<Attie[m]>
(no time scale doesn't help...)
<rogandawes[m]>
sorry, I can add that, it was all pretty much instantaneous.