<d1b2>
<brainstorm> I've observed this while jtag-pinout-ing the SH4: I: g.applet.interface.jtag_pinout: JTAG interface without reset detected Currently there's no way to indicate a TRST signal, right? Thanks for the reply on the SH4 discussion, btw!
<whitequark>
what do you mean there's no way?
<whitequark>
use `--pin-trst`
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<d1b2>
<brainstorm> Ah, doh, thanks, I just ran jtag-pinout applet without indicating 5 pins instead of 4, so that it can possibly detect the TRST: glasgow run jtag-pinout --port A --pins-jtag 1,3,5,6 -f 250 -V 1.8 Thanks again, learning...
<d1b2>
<brainstorm> One of the J-core folks also mentioned that those are really hard to source from ebay and usual suspects and that one's better off just buying from that particular japanese website. My crowdfunding offer still stands, btw.
<d1b2>
<brainstorm> Yes, I am sure. If you are willing and able to support it for Glasgow, why shouldn't I? I like to have sharp tools that work well when I need them 🙂
<whitequark>
there are inherent uncertainties associated with developing something like this
<whitequark>
like, it's possible that i won't be able to RE the interface or implement a useful debugger
<whitequark>
i've never touched SH4 before
<d1b2>
<brainstorm> Yes, I'm aware of the risks, but your priors are somewhere in between good and very good, so far 🙂
<ebb>
I can't remember if the Casio graphing calculators have SH3 or 4
<ebb>
ah, it seems "depends on generation"
<whitequark>
do those have JTAG accessible?
<ebb>
pass
<d1b2>
<brainstorm> https://apnet.co.jp/product/superh/ap-sh4-1a.html <--- this one seems to list compatible JTAG/H-UDI probes: "XrossFinder Evo、XrossFinder、FlashWriter EX", according to feedback from the J-core dev added on the Github discussion thread, the XrossFinder works for him right away.
<d1b2>
<brainstorm> And the white pin connector at the top seems to be JTAG-y?
<d1b2>
<brainstorm> Seems to be an all-pins breakout type of board, I'd be very surprised if JTAG was not properly exposed... it even has decent app notes: https://apnet.co.jp/support/an/an131.pdf
<d1b2>
<sys64738> the BSDL of the part from Toble_Miner has some... interesting sections: https://bpa.st/YZKA
<whitequark>
yeah par for course
<d1b2>
<brainstorm> No pressure, I understand the potential time and energy commitment that this entails, I personally do this for fun/hobby only since I do 0 electronics at #dayjob but I love the puzzle. I'd like to contribute to this and learn + also help others that might want to do similar things. Feel free to email me (brainstorm at nopcode dot org) for money logistics if you decide to go ahead, happy to help! 😉
<whitequark>
basically, if you have $350 you're ready to lose, i'm fine looking at it and documenting it at leasy
<whitequark>
*least
<whitequark>
marcan can probably buy it easily and reship?
<d1b2>
<brainstorm> Yep, deal me in, let's get this rolling.
<whitequark>
okay, can do that
<whitequark>
will handle soon then
<d1b2>
<brainstorm> Fantastic!
<whitequark>
worst case I just ship the board to someone more skilled
<d1b2>
<brainstorm> I gather that's not just the board, but the XrossFinder probe too?
<d1b2>
<brainstorm> In any case, I'm in.
<whitequark>
I think I can get useful results without the vendor probe
<whitequark>
at least without the hardware
<whitequark>
once you see a few JTAG ICE interfaces they all kinda look samey
<d1b2>
<brainstorm> I see, I was a bit spooked by the J-core dev comment I pasted on GH discussions: > First this the JTAG does is to upload a binary blob into > the SH4 (is called ASE memory). This provides specific/custom > functionality that the probe uses later on (like for example cache > misses ratio calculator).
<electronic_eel>
but couldn't it be that you need to upload some special code through the jtag interface before you can do any real debugging?
<electronic_eel>
ah, yeah, that what brainstorm just posted is what i meant
<electronic_eel>
i don't know if you can get this blob without extracting it from the debugger probe
<whitequark>
this is normal, MIPS EJTAG has the same and i just wrote the blobs
<whitequark>
they're generally not magix
<whitequark>
even openocd on arm does something similar
<whitequark>
also, chances are the blob is in the software
<electronic_eel>
were the necessary registers and so on documented enought for you to write the blobs in the past? or was that a lot of guesswork and intuition?
<whitequark>
they're generally documented as a part of core special registers
<whitequark>
sh4 could be different
<whitequark>
but like... do you need perf counters?
<whitequark>
you want a gdb stub
<electronic_eel>
yeah, there are different levels and goals of debug interfaces. what the vendor probe does doesn't need to be what glasgow should do
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