#armlinux on 2023-11-10 — irc logs at libera.irclog.whitequark.org

2021-05-27 16:22 ChanServ changed the topic of #armlinux to: ARM kernel talk [Upstream kernel, find your vendor forums for questions about their kernels] | https://libera.irclog.whitequark.org/armlinux

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12:39 <ajb-linaro> so who still remembers the ARMv7 MMU code? Specifically

12:39 <ajb-linaro> mcrp15, 0, r0, c1, c0, 0@ write control reg

12:39 <ajb-linaro> mrcp15, 0, r3, c0, c0, 0@ read id reg

12:39 <ajb-linaro> is reading MIDR some sort of barrier?

12:40 <ajb-linaro> because r3 gets trashed straight away later in the sequence

12:40 * ajb-linaro is currently failing to enable a flat virtual identity map for some test system binaries for QEMU

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14:43 <maz> ajb-linaro: MIDR isn't a barrier at all.

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14:52 <ajb-linaro> maybe I read the coproc wrong. p15, 0, c1, c0, 0 => cp15, opc1 = 0, crn = 0, crm = 0, opc2 = 0?

14:53 <ajb-linaro> DBGDIDR?

14:54 <ajb-linaro> still confused as what the mrc ^ is meant to be doing though

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15:29 <Guest3105> ajb-linaro: which kernel version, and can you map the PC to somewhere within head.S?

15:30 <Guest3105> Oh wait, is that Linux at all?

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15:33 <ajb-linaro> mrutland yep - __turn_mmu_on from arch/arm/kernel/head.S

15:35 <mrutland> ajb-linaro: ah, sorry, I was looking at arch/arm/boot/compressed/head.S by accident, and couldn't spot the sequence!

15:36 <mrutland> ajb-linaro: looking at the blame for the file, I suspect that was being abused as a barrier on old implementations, even though it's not a barrier.

15:36 <mrutland> e.g. d675d0bc47f28c5414fbbe17fcc801f69c45b960 adds missing ISBs there

15:37 <mrutland> the tailing sequence looks distinctly odd regardless

15:38 <mrutland> I think the 'mov r3, r3' was being used as a NOP / pipeline flush for simpler CPUs, as there were two back-to-back in the first commit (1da177e4c3f41524e886b7f1b8a0c1fc7321cac2)

15:38 <ajb-linaro> mrutland so left over from the addition of the instr_sync instructions?

15:40 * ajb-linaro is mostly trying to follow the code while writing an Arm v7 equivalent of boot.S equivalent of https://gitlab.com/qemu-project/qemu/-/blob/master/tests/tcg/aarch64/system/boot.S?ref_type=heads

15:41 <ajb-linaro> just for tests, not to be big and professional like Linux's MMU code ;-)

15:43 <mrutland> Mhmm.. I'm aware of no reason to read an ID reg here; I think that's just a zombie that should have been deleted years ago

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15:46 <ajb-linaro> what about the mov r3,r3 - are there supported systems that would care?

15:46 * ajb-linaro is curious why you wouldn't just mov pc, r13

15:46 <mrutland> I don't think so -- I think that's also zombie nonsense

15:48 <mrutland> For ARMv7 stuff I'd follow the same approach as for ARMv8 -- poke the control regs, ISB, then immediately do what you wanted to. There shouldn't be any need to place instructions without an obvious function

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