ChanServ changed the topic of #armlinux to: ARM kernel talk [Upstream kernel, find your vendor forums for questions about their kernels] | https://libera.irclog.whitequark.org/armlinux
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<arnd> drewfustini: dw_mmc.c is designware's own MMC controller design with a custom register layout, which used to be fairly popular, but I'm guessing that it is no longer updated for the latest specifications
<arnd> SDHCI is a vendor-neutral spec for SD/MMC controllers with a standard register layout implemented by a number of companies including designware, which licenses it to other parties
<arnd> I would guess that a number of the other sdhci-*.c files are actually designware based as well, but use the common sdhci code directly rather than the intermediate sdhci-of-dwcmshc.c abstraction. Hard to know for sure
<arnd> I can see that the original contribution of sdhci-of-dwcmshc.c was done by Jisheng Zhang, who maintains the Synaptics (formerly Marvell, not related to Synopsys) Berlin platform, but he never mainlined the later Berlin dts files
<geertu> There's also SDHI and TMIO
<geertu> And given the tendency to have NDA'd documentation for SD-card controllers, it's difficult to know who's using what, and what it is derived from.
<geertu> Still, SD managed to cry victory over Sony MS ;-)
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<Amit_T> External aborts on ARM64 can be synchronous as well asynchronous, but if EA's are signaled through SError, are these always asynchronous ?
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<Xogium> so, there any way to confirm my theory that its because linux console subsystem doesn't like having congested console if there are multiple ones connected to printk/dmesg or what have you ?
<Xogium> really curious to determine if that was really the issue I hit, with somehow putting ttyGS0 before S0 made every boot issue disappear, the hang, the reboot in your face unless you actually listen to the ttyACM port
<Xogium> weirdest issue I ever hit in a long while, the last one that was that insane was somehow managing to cause a kernel panic and still have userspace running
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<drewfustini> arnd and geertu: thank you for much for your insights
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<drewfustini> arnd: I didn't realize that Synaptics bought part of Marvell. I have to admit "berlin" always catches my eye when grepping through linux
<drewfustini> I appreciate knowing the history
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<arnd> drewfustini: individual business units get moved around a lot. Synaptics also has Broadcom's wireless SoCs, NXP has Marvell's wireless SoCs and Marvell has Broadcom's server chips (by way of Cavium, but then discontinued)
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<maz_> Amit_T: no, see SCR_EL3.EASE=1.
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<Amit_T> maz_: okay, I see this SCR_EL3.EASE=0, so its pretty much an asynchronous one, right?
<Amit_T> sorry, taking the above statement back. its the way its routed but always synchronous.
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<drewfustini> arnd: thanks for the advice about SDHCI. I see now in the databook that "DWC_mshc_crypto implements all the registers defined by the SD Host Controller Specification that defines registers for SD, SDIO and UHS-II modes. Some of these registers are reused in the eMMC mode." This SoC has that IP configured for eMMC only card interface type. I am hoping that means the SDHCI driver will still apply.
<drewfustini> The probe fails about half way through on a timeout so I'm going slowly going through all the MMIO read and writes to see what is happening with the various registers
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