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<zmatt>
tmlind: do you have any idea why linux (tested on 4.19-ti and 5.10-ti) on the dra7xx/am57xx leaves the requested power domain state for the cpu cores at ON (rather than INACTIVE or RETENTION), effectively rendering cpuidle ineffective?
<zmatt>
I made a tiny util (https://github.com/mvduin/omap5-cpu-pm) that allows changing it to INACTIVE or RETENTION, and I get a 10 ͏°C cpu temperature reduction, from 61 to 51, with no _obvious_ ill effects
<zmatt>
though I worry there might be some good reason cpu power management is disabled I'm unaware of
<zmatt>
hmm, it seems to mess with system load measurement, at least on 4.19
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<NishanthMenon>
arnd: will be droppign in for elc, though lpc opened up earlier today, i would be missing the HIGH_MEM and the MC/arch discussions :(
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<NishanthMenon>
zmatt: 7abdb0e23e7bc8da685da5a54eb9f2f67f922ef2 (it ends up pointing at me)
<NishanthMenon>
zmatt: i think what you might be seeing is what we also saw when i did the original patches, it mostly works, but production testing uncovered issues around it - i dont think TI published the details in public, so might not be pertinent for me to share, the production tests however tend to be much rigorous than my usual desk based testing..
<NishanthMenon>
rcn-ee: ^^ :(
<zmatt>
NishanthMenon: sucks that it was dropped from investigation... I guess power management wasn't considered as important for the dra7, but on the other hand it does seem to have significant impact on temperature and the am5729-based BeagleBone-AI is known to suffer from overheating
<NishanthMenon>
zmatt: yep. One of those '@#!' kind of deal. You could probably file an e2e.ti.com ticket, but I doubt it is going to get additional info. Rigor we had during old omap days dallied a bit back with lack of customer interest during dra7, though similar interest seems resurgent with am62 in k3 arch.. I guess tech fashion
<zmatt>
maybe those customers tried to do pinmux on dra7 ;-)
<NishanthMenon>
Uggh I was in front of VP with a presentation on why iodelay was a bad idea.. you are touching a very sore point for me
<zmatt>
hehe, sorry
<NishanthMenon>
No worries..
<zmatt>
I mean, was it a bad idea or just badly implemented?
<NishanthMenon>
Bad bugs
<NishanthMenon>
Hence not worthy of production. Dynamic pinmux ... Let's just say, static config at boot people won't that round.
<zmatt>
it certainly seemed a bit... heavyweight to use three programmable delay lines per I/O to line up your signal timing...
<NishanthMenon>
Mmm... Tempting, but I will stay out of commenting ;)
<zmatt>
but it sounds like dra7 is the first and last SoC with iodelay? ;)
<zmatt>
just like dm816x was the first and last SoC with flying-adder PLLs
<NishanthMenon>
zmatt: oh yes indeed, also the motivation why i took a few years sabbatical and joined forces with soc arch folks for k3 arch ;)