whitequark changed the topic of #amaranth-lang to: Amaranth hardware definition language · code https://github.com/amaranth-lang · logs https://libera.irclog.whitequark.org/amaranth-lang
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<_whitenotifier-e> [YoWASP/nextpnr] whitequark pushed 1 commit to develop [+0/-0/±1] https://github.com/YoWASP/nextpnr/compare/bcec7ade8cb0...71e3cedf2d3f
<_whitenotifier-e> [YoWASP/nextpnr] whitequark 71e3ced - Update dependencies.
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<_whitenotifier-e> [YoWASP/yosys] whitequark pushed 1 commit to develop [+0/-0/±1] https://github.com/YoWASP/yosys/compare/d9bf6189e528...a342420eb886
<_whitenotifier-e> [YoWASP/yosys] whitequark a342420 - Update dependencies.
<Degi> Is "If the amount is positive, the input rotated right. Otherwise, the input rotated right." supposed to be "If the amount is positive, the input rotated right. Otherwise, the input rotated left." in https://github.com/amaranth-lang/amaranth/blob/b452e0e87172c673a9b8beae6497c96a281eb983/amaranth/hdl/ast.py#L502
<cr1901> By substituting amount=-1 in Cat(self[amount:], self[:amount])
<cr1901> The MSB becomes the LSB
<cr1901> that would be a rotate left
<cr1901> And the previous LSB becomes the second bit, etc
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<SimonSapin> Simulator.advance is documented "If there is an unstable combinatorial loop, this function will never return." Should there be a check that the graph of combinatorial Value’s is acyclic, to avoid this situation?
<SimonSapin> wouldn’t such a cycle always be an error?
<whitequark> perhaps, but actually implementing that is a major undertaking
<Sarayan> whitequark: algorithmic issue or current-implementation structure issue?
<whitequark> latter. for the same reason combinatorial loops are not detected during synthesis
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<d1b2> <dave berkeley> Is there a way to ask a ClockDomain what its frequency is?
<whitequark> no
<d1b2> <dave berkeley> thanks. Another question. Would it make sense to have a PLL class : something that will work across a range of FPGA families? Litex has a system that seems to work okay.
<whitequark> there's an open issue for that
<d1b2> <dave berkeley> thanks, I'll take a look.
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<d1b2> <dave berkeley> I've just written someone for the ECP5 which does work, but it doesn't have the flexibility of the Litex approach.
<d1b2> <dave berkeley> I should have looked at this issue first!
<_whitenotifier-e> [amaranth] ECP5-PCIe commented on issue #425: Support for PLL primitives - https://github.com/amaranth-lang/amaranth/issues/425#issuecomment-1055422535
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