azonenberg changed the topic of ##openfpga to: Open source tools for FPGAs, CPLDs, etc. Silicon RE, bitfile RE, synthesis, place-and-route, and JTAG are all on topic. Channel logs: https://libera.irclog.whitequark.org/~h~openfpga
<Degi>
The ECP5 VCO on my chip can go a bit over 3000 MHz but doesn't seem to properly lock up there anymore
<Degi>
(But only with an output divider of 5, not sure why, maybe the clock tree can't keep up with anything faster)
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<Peanut>
That's proper fast for a chip like that.
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<Degi>
Maybe it can go even faster with a different KVCO value, though not sure what that would be useful for. At 3000 MHz the frequency seemed somewhat higher than what I'd expect, as in it didn't seem to be frequency locked. At 2800 MHz it was quite close though.
<Degi>
One weird thing is that I can get a higher output clock frequency with the VCO at 1500 MHz or so and the divider at 1
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