azonenberg changed the topic of ##openfpga to: Open source tools for FPGAs, CPLDs, etc. Silicon RE, bitfile RE, synthesis, place-and-route, and JTAG are all on topic. Channel logs: https://libera.irclog.whitequark.org/~h~openfpga
<Peanut>
Hi - on ECP5, I'm trying to use the DCU with an external clock (EXTREFB). The datasheet (TN2206, fig 8.2) shows that there is a line 'REFCLK_TO_FPGA_CORE' - but I cannot find a corresponding output port in the module, how would one make use of this port?
<Peanut>
To clarify: I can use the port in the DCU just fine, but would like to use the clock also as a clock within the verilog design itself.
<Peanut>
"Failed to find a route for arc 1 of net refclock" when I try to use it in a design anywhere else than in the DCU.
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