azonenberg changed the topic of ##openfpga to: Open source tools for FPGAs, CPLDs, etc. Silicon RE, bitfile RE, synthesis, place-and-route, and JTAG are all on topic. Channel logs: https://libera.irclog.whitequark.org/~h~openfpga
<jevinskie[m]> But that’s why they told me to get the 5G after this happened with the older model. 🤦‍♂️ guess it’s dead, Jim. “We just received an update regarding your PO # 22838490. When we went to order part # 842-LE5UM5G45FEVN from Lattice, they advised that this part is now discontinued.”
emeb has left ##openfpga [##openfpga]
thaytan has joined ##openfpga
Degi_ has joined ##openfpga
Degi has quit [Ping timeout: 252 seconds]
Degi_ is now known as Degi
specing has quit [Killed (NickServ (GHOST command used by specing_))]
specing_ has joined ##openfpga
specing_ is now known as specing
eightdot has quit [Ping timeout: 240 seconds]
Lord_Nightmare has quit [Quit: ZNC - http://znc.in]
eightdot has joined ##openfpga
kristianpaul has quit [Read error: Connection reset by peer]
kristianpaul has joined ##openfpga
Lord_Nightmare has joined ##openfpga
X-Scale has quit [Ping timeout: 265 seconds]
X-Scale` has joined ##openfpga
X-Scale` is now known as X-Scale
<gatecat> jevinskie[m]: I think the problem is Lattice discontinued the clock generator chip it used (ispClock5406D), and have presumably decided a respin with different clocking isn't worth it
<sorear> is this how they get people on 28nm?
specing has quit [Ping timeout: 265 seconds]
specing has joined ##openfpga
unkraut has quit [Ping timeout: 252 seconds]
specing has quit [Ping timeout: 260 seconds]
benreynwar has quit [Ping timeout: 260 seconds]
benreynwar has joined ##openfpga
_florent_ has quit [Ping timeout: 268 seconds]
JSharp has quit [Ping timeout: 260 seconds]
JSharp has joined ##openfpga
_florent_ has joined ##openfpga
egg|cell|egg has quit [Ping timeout: 246 seconds]
emeb has joined ##openfpga
mewt has quit [Quit: leaving]
mewt has joined ##openfpga
tokomak has joined ##openfpga