whitequark changed the topic of #yosys to: Yosys Open SYnthesis Suite: https://github.com/YosysHQ/yosys/ | Channel logs: https://libera.irclog.whitequark.org/yosys/ | Bridged to #yosys:matrix.org
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<tnt> Can someone tell me what causes $scopeinfo cells to be emitted in the JSON ?
<tnt> I know I can use -noscopeinfo to avoid them, but I have two cases where in both cases I don't have that option and one ends up with none of those and one ends up with 525 of them and I'm trying to understand which difference between the two causes them to be generated in the first place.
<tnt> Actually nevermind this is yosys 0.46 why are scopeinfo emitted at all ...
<whitequark[cis]> they are always emitted, and are used primarily by tools like cxxrtl and sby
<whitequark[cis]> as far as i recall anyway
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<Guest48> Hi there. I'm have a big difficulty with compiling nextpnr-himbaechel on debian 12. The apycula cannot be installed.
<bjorkintosh> Guest48: what are the specific errors it's reporting?
<Guest48> installing in a venv does not help, -- Apycula install prefix: (not set, using Python: /usr/bin/python3)
<Guest48> ModuleNotFoundError: No module named 'apycula'
<Guest48> those type of errors
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<lofty[m]> it seems you don't have apycula installed.
<Guest48> I created a venv, and installed apycula using pi install apycula
<Guest48> oops pip install apycula
<Guest48> Hi lofty. Well, my venv thinks it is install wheras my make does not seem to 'see' it..
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<lofty[m]> you can manually specify the path with -D APYCULA_INSTALL_PREFIX=... to cmake
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<lofty[m]> you can manually specify the path with -D APYCULA_INSTALL_PREFIX=... to cmake
<Guest48> AttributeError: 'Device' object has no attribute 'sip_cst' hmm.. interesting..
<Guest48> Ooh.. updated the venv, it builds now.
<bjorkintosh> there you go.
<bjorkintosh> Guest48: the error messages are your friend.
<Guest48> :D
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<janrinze> Pffooeeii.. finally managed to convince Pidgin to connect to libera.chat..
<janrinze> Thanks for helping me to get the apycula stuff sorted out.
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<janrinze> Are there some 'gotcha's with Gowin? I have a design that runs fine on 4 other boards but not on the Tang Primer 20k. It works like '90%' where a few signals stay 0 all of the time.
<lofty[m]> there shouldn't be, to my knowledge. that sounds like a timing failure of some sort to me.
<tnt> Is there something special I need to put in the .sby file for it to `define FORMAL ?
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<lofty[m]> janrinze: what are your other boards?
<janrinze> Oh, ULX3s, CMOD-A7, HX8K devel board..
<lofty[m]> hm. could you pastebin the nextpnr output for the tang nano 20k? I have a hunch the GW2A might not have timing data yet
<janrinze> lofty[m]: I found out that I use the LAN8720 board with the other devices whereas the Primer 20K has a RTL8201F.
<janrinze> What happens is that all data comes in on both boards but the Primer 20K does not manage to finish the CRC check for an ipv4 packet..
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<janrinze> is BUFG required when using a clock source from a pin on Gowin?
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