whitequark changed the topic of #yosys to: Yosys Open SYnthesis Suite: https://github.com/YosysHQ/yosys/ | Channel logs: https://libera.irclog.whitequark.org/yosys/ | Bridged to #yosys:matrix.org
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<mkudinov> Hey guys. I've been synthesizing some examples from Harris & Harris book using Yosys and netlistsvg and I've got a very strange result. It should be AND with inverted input, but synthesis gave me NAND. Here's the code and synthesis commands: https://paste.debian.net/1309815/ And here's the synthesis result I've got (colored) and the solution from
<mkudinov> the book (black and white): https://imgur.com/a/3UxaJvd
<tpb> Title: debian Pastezone (at paste.debian.net)
<tpb> Title: Imgur: The magic of the Internet (at imgur.com)
<mkudinov> Is this a bug or am I doing something wrong?
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<Wanda[cis]> this looks like a netlistsvg bug
<mkudinov> Yeah I thought so too initially, but after synthesis Yosys gives this output:
<mkudinov> ```3.1.2. Re-integrating ABC results.
<mkudinov> ABC RESULTS: ANDNOT cells: 1
<mkudinov> ABC RESULTS: OR cells: 2
<mkudinov> ABC RESULTS: internal signals: 1
<mkudinov> ABC RESULTS: input signals: 3
<mkudinov> ABC RESULTS: output signals: 2
<mkudinov> ```
<mkudinov> so NAND is actually present in the netlist
<lofty> no, NAND is not present
<lofty> ANDNOT is
<mkudinov> oh damn
<mkudinov> my bad then
<lofty> A & ~B, which is different to ~(A & B)
<mkudinov> yeah now I got it, English is not my first language so I didn't know that ANDNOT is not equal to NAND
<mkudinov> Thanks for help guys!
<mkudinov> Indeed they thought that ANDNOT refers to NAND just as me. It was fixed in the latest commit
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