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<xiretza[cis]>
what am I doing wrong if hi-z outputs on iCE40 drive the pin low instead? I have nothing but an `assign q = 1'bz;` at this point. oss-cad-suite 2024-02-12
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<Wanda[cis]>
ISTR this is a long-standing yosys bugs
<xiretza[cis]>
indeed a manual SB_IO works, now I just need to find out why it didn't in VHDL
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<xiretza[cis]>
ah, guess I was just debugging myself into a corner by simplifying it more and more, works like a charm now with a concurrent when/else rather than an if/else in a process