whitequark changed the topic of #yosys to: Yosys Open SYnthesis Suite: https://github.com/YosysHQ/yosys/ | Channel logs: https://libera.irclog.whitequark.org/yosys/ | Bridged to #yosys:matrix.org
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<Myrl-saki> Hm. I think I understand. CS is probably not tristate but disable output.
<Myrl-saki> So I sitll need an output stage, but with a reduce_or instead.
<Myrl-saki> Or an AND gate? idk
<Myrl-saki> I can just, actually test that lol
<Myrl-saki> I could also use the INJECT fun stuff :)
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