<d1b2>
<vipqualitypost> do you know what the target price is?
<d1b2>
<josHua> I do not
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<d1b2>
<altracer> Once you are done with ngscopeclient release for thunderscope, how complicated will it be to add support for hsdaoh of steve-m? He's active on #sigrok, and there are example desktop TCP clients, I think, for the USB 3.0 8ch 72MHz (or 16ch 36MHz) setups with FPGA or RP2350 PIOSM. https://discord.com/channels/613131135903596547/701517294697840700/1241122382098337953
<d1b2>
<altracer> Do you want to wait for 3rd party MP253 SoM with 2x RGMII and FMC/QuadSPI (PCIe? USB3?) or trace LPDDR4 yourself? (eMMC and STPMIC2 are simpler, but mandatory as well)
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<d1b2>
<azonenberg> I'm not using a SoM, i'm trying to get this done in the next couple weeks
<d1b2>
<azonenberg> I have a full sodimm of ddr3L on this board i can't imagine lpddr4 will be that bad to route
<d1b2>
<azonenberg> i am not using eMMC, my plan is to boot from qspi nor flash
<d1b2>
<azonenberg> i am also not using the pmic. in most of my large designs these days i use a stm32l431 as a rail sequencing and reset controller
<d1b2>
<azonenberg> it hooks up to enable and pgood and reset of everything on the board and sequences everything up and down
<d1b2>
<azonenberg> it helps that i'm not using overdrive or low power sleep mode so i can keep the digital rails at 0.8 and 0.82V all the time
<d1b2>
<azonenberg> (with a bunch of big ADCs and such on the board it's not even worth thinking about power consumed by the SoC)