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<GuineaWheek[m]> i found out the hard way that if you take a pointer of a static/const field and reference it in copy_nonoverlapping even through a u32 conversion the compiler may elide the read to whatever you defined the constant/static field to be
<GuineaWheek[m]> i was using sections to define fields i would init to as [0xff; _] in flash so i could overwrite them at runtime as pseudo-efuses
<GuineaWheek[m]> wish there was a dynamically sized version of read_volatile
<Lumpio-> Making one by using a loop probably results in very similar code
<Socke> how do I correctly use the esp32 ADC? in the IDF documentation I read that the internal reference is about 1100 mV. but in my experiments, the ADC raw output peaked at 3839 on roughly 850 mV. is my esp broken? Am I doing something wrong? I would assume I could at least get 4095 out of the ADC
<Socke> I am applying the voltage directly to the pin from my lab PSU and double-checking it with a DMM. there is also a small capacitor (few nF) directly attached to the pin. once I max out the ADC, the reading is stable at 3839
<Socke> wtf. I restarted the ESP and now I am getting correct values o.O
<Socke> "correct" in the sense that it now maxes out at 4095
<Socke> is there a rate limit to read_raw()? I have the following procedure to slightly reduce noise: read 16 samples in a loop, then average over those. If I log all the "sub-samples" using info!(), then I can correctly read 4095. If I comment out the logging, I only get 3839 o.O
<Socke> interesting. If I replace the info!() call with a small 10ms sleep, I also get the correct 4095
<Socke> so there certainly is a limit...
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<ryan-summers[m]> Check what read_raw() is actually doing. It very well might just be reading the ADC result register, which is not sufficient to guarantee a sample is acquired
<ryan-summers[m]> For an ADC, you need to respect the sample & hold setup time and then the acquisition time before the result is placed in the output regs. You also generally have to initiate the conversion. Is `read_raw()` doing all of that properly?
<Socke> it get's even weirder. if I log the sub samples array AFTER collection, I get correct results. but when I don't log it AFTER collection, I get broken results. is this some kind of miscompilation? o.O
<Socke> I just checked the binary repr of 3839: looks like there is one bit flipped: 0b111011111111
<ryan-summers[m]> I would say it's much more likely to be the different delays imposed when you introduce logging personally.
<Socke> ryan-summers[m]: there is zero timing difference during sample collection
<ryan-summers[m]> I'm just saying, the number of times its a compiler bug vs an implementation bug has been near 99% implementation from past experience, so try digging there first
<ryan-summers[m]> It sounds to me like the ADC timing requirements aren't being respected
<Socke> this is the code: https://pastebin.com/JFg96QCf
<Socke> all 3 measures (sleep, logging each sub-sample individually, logging whole array) solve the problem
<ryan-summers[m]> The ESP examples don't use read_raw, so why are you? https://github.com/esp-rs/esp-idf-hal/blob/master/examples/adc.rs
<Socke> this whole code is being run in a loop with a thread::sleep(1s) call
<Socke> ryan-summers[m]: I haven't found that example, will check it out. I used read_raw since read() returned some "garbage" value (probably converted to mV)
<Socke> okay, example is weird: they're using ADC2 on esp32, but I read that ADC2 on esp32 does not work while wifi is on...
<Socke> ryan-summers[m]: I would btw expect that the esp idf does all the required timing, especially in oneshot mode
<Socke> okay, I set calibration to true in the adc config and now the samples come out fine even without any extra sleeping or logging
<ryan-summers[m]> Glad to hear you got it working. Might be worth opening a Github issue around this. If the calibration is that necessary, maybe it should be the default state
<Socke> okay, this drives me crazy. this is not repeatable -.-
<Socke> I'll try a different esp
<ryan-summers[m]> Is your PSU reliably hooked up? Is it possible there is some kind of intermittent connection (i.e. broken jumper wire, marginal contact, etc)?
<Socke> PSU is fine, already checked all the connections
<Socke> I guess if the PSU/connection would be the issue, I would see more random readings and not just consistently one bit being 0
<Socke> I switched to read(): that gives me reliable values that are actually accurate to +-3mV. maybe I'll use that API instead
<Socke> it's stupid because I want to attach a voltage divider to the input in order to measure slightly higher voltages... so doing the calculations myself would probably be a little more accurate. but on the other hand read() hopefully solves all the nonlinearity issues as well
<Socke> and since read_raw() seems to be broken for me, I have no choice anyways
<Socke> okay, tried another esp32c3. same behaviour with read_raw. I think that function is just broken currently
<Socke> which is surprising, since the code for read() just calls read_raw() and then raw_to_cal() o.O
<ryan-summers[m]> Definitely open a GH issue. It might be related to timing where it sometimes works and sometimes doesn't, but the read function happens to have timing tha tworks
<ryan-summers[m]> s/tha/that/, s/tworks/works/
<Socke> will do
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<zeenix[m]> How do you folks usually get around serde traits not being implemented for alloc types?
<JamesMunns[m]> zeenix[m]: they are, if you enable the alloc feature of serde
<zeenix[m]> ah :)
<ryan-summers[m]> If you have other issues not related to that, you can always do a custom serde impl using newtypes / wrappers
<JamesMunns[m]> (postcard also has an alloc feature, for the record)
<zeenix[m]> James Munns: nice! I can then drop my custom schema impl
<zeenix[m]> <ryan-summers[m]> "If you have other issues not..." <- yeah, just that Deserialize isn't always easy/simple to impl
<zeenix[m]> James Munns: couldn't be too lucky :)... (full message at <https://catircservices.org/_matrix/media/v3/download/catircservices.org/geHaSWtMNMTIysFzfTJkasHx>)
<zeenix[m]> seems postcard is missing #[cfg(target_has_atomic = "ptr")]
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<flippette[m]> Hi, I have some buttons wired to GPIO pins on a Pi Pico, and I want to use an interrupt to read button presses and update an atomic variable. From the docs I think I'm supposed to use IO_IRQ_BANK0 from rp2040-pac, but how can I get more information about the pin that triggered the interrupt?
<JamesMunns[m]> flippette[m]: Here's how the embassy ISR handler works for that: https://github.com/embassy-rs/embassy/blob/03b8e36532427377aa01ea7dedaa97a9540e7d26/embassy-rp/src/gpio.rs#L212-L243
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<zeenix[m]> James Munns: finally figured out why my events were not getting received on the host side 😢 https://github.com/jamesmunns/postcard-rpc/blob/main/source/postcard-rpc/src/host_client/raw_nusb.rs#L19
<JamesMunns[m]> We're your ERRORS larger than that as well?
<zeenix[m]> James Munns: errors?
<JamesMunns[m]> zeenix[m]: Ohh I get it
<zeenix[m]> James Munns: it's whole message that's larger than that in serialized format
<JamesMunns[m]> zeenix[m]: The ok response WAS being sent, but the host dropped it
<JamesMunns[m]> JamesMunns[m]: Before you were troubleshooting never getting an error message
<zeenix[m]> James Munns: oh I'm not sure if this related to the "endpoint silently dropped" issue I'm also having (haven't checked yet) but right now I'm looking at event being successfully sent from the firmware but not getting received on the other side. It works if the size is lower than 1k
<JamesMunns[m]> Yep, that is expected then, I didn't realize how large the message actually was
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<GeorgesP[m]> Hello, I am writing a no_std no_alloc (using heapless) protocol client driver based on embedded-io-async::Read+Write, but the server along responding to requests can also asynchronously send some notification (JSON RPC based). So the client need to be continuously read() for some data from the TCPStream. The target for the crate is to be used on embassy, but I would prefer not depending on embassy directly so I can also have a
<GeorgesP[m]> tokio implementation on host. My first solution was to use tokio::io::split() to separate the Sender and the Receiver (because many embassy hal provide it too) so I can have a ClientRx in a task doing continuous read().await, but it require a lot of heapless::spsc::Queue to transmit information between ClientRx and ClientTx... Is there a way to share a single Client resource without depending on embassy or other executor, and
<GeorgesP[m]> staying no-alloc ? Thx
<Socke> not sure if that is what you want but you could try wrapping your TcpStream in an Arc
<Socke> (you need to find a no-alloc Arc though...)
<GeorgesP[m]> I saw heapless::pool::Arc but it is for arm_llsc and x86, and my final target will be ESP32S3...
<zeenix[m]> James Munns: "endpoint methods just hanging on the host-side and not getting received on the firmware" issue seems unrelated so far in my testing.
<GeorgesP[m]> embassy-net ::tcp::TcpSocket is using core::cell::RefCell... Maybe I should get inspired... (Sorry to expose my skill issue here, I am still learning)
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<diondokter[m]> Hey all! Could use some input here.... (full message at <https://catircservices.org/_matrix/media/v3/download/catircservices.org/NUXDarXryJzwOTlqqeiEYLje>)
<diondokter[m]> It's funny because the implementation is trivial. The naming, omg, so much harder!
<diondokter[m]> * Hey all! Could use some input here.... (full message at <https://catircservices.org/_matrix/media/v3/download/catircservices.org/OWyHNduIlTGgySoZbYBNEJxs>)
<K900> That just sounds wrong?
<K900> Like, how would you distinguish 1,2,3 and 1,2,4
<K900> * and 1,2,[3 skipped]4
<diondokter[m]> I agree, but you know... It's what his hardware speaks.
<diondokter[m]> I believe it's mostly for the last parameter
<diondokter[m]> And if it's really cursed it could see it from the int vs string types
<diondokter[m]> * last parameter(s)
<K900> Well maybe they just need to change the command schema then
<K900> So instead of (one, two, three, four) it's just (one, two, four)
<diondokter[m]> Well yeah, but the builder is itself a builder pattern. So that'd be annoying at least
<diondokter[m]> Although, maybe it's doable with the builder itself. Of course it doesn't have to be all a one liner
<K900> I'm not sure what the API looks like tbh so it's hard for me to tell
<diondokter[m]> He posts an example
<K900> Oh wait
<K900> I thought you had hardcoded schemas
<K900> For commands
<diondokter[m]> Really depends on the hardware you're talking to
<K900> And I think the example might only make sense for _trailing_ commas?
<diondokter[m]> I think so yeah
<K900> diondokter[m]: Yeah but I was thinking of type level serde kind of stuff
<K900> But this is not that
<diondokter[m]> Ah, I think you're thinking about the atat crate
<K900> Yep
<K900> That's the one
<K900> And now I realize it's not the same one
<K900> I wonder if you can just have a method to strip trailing commas
<diondokter[m]> Yeah, that's way more elaborate. Idk what's better. but it's good to have the choice
<K900> And have that cover the use case
<diondokter[m]> Sure, but that'd feel wrong haha
<K900> I actually kinda like it
<K900> Because it's really (presumably) a property of the dialect
<K900> At least I'd like to think it is until someone finds a sufficiently cursed device
<diondokter[m]> Maybe? Idk... It's good to mention in the issue at least for consideration
<dirbaio[m]> `with_optional_string_parameter` -> `with_optionaler_string_parameter`
<dirbaio[m]> leaves room for future with_optionalest_string_parameter :D
<diondokter[m]> dirbaio[m]: :P
<diondokter[m]> Yes, room for api evolution!
<diondokter[m]> Hmmm, this is thoroughly meh, but I get to be lazy and not have make a new release for the crate:... (full message at <https://catircservices.org/_matrix/media/v3/download/catircservices.org/hqepBwjxHlNGwodFqgnfkdOS>)
<diondokter[m]> * Hmmm, this is thoroughly meh, but I get to be lazy and not have make a new release for the crate:... (full message at <https://catircservices.org/_matrix/media/v3/download/catircservices.org/DKkvtQLaaynvaWqtRAZpNbdW>)
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<Dherse[m]> Hello friends, anybody's got any idea why an STM32 would hang at any memory write after enabling the D-Cache?
<diondokter[m]> Dherse[m]: ***Any*** memory write?
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<FreeKill[m]> Don't you need to configure the mpu sections if you have the d cache enabled?
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<balbi[m]> <diondokter[m]> "Hmmm, this is thoroughly meh..." <- > <@diondokter:matrix.org> Hmmm, this is thoroughly meh, but I get to be lazy and not have make a new release for the crate:... (full message at <https://catircservices.org/_matrix/media/v3/download/catircservices.org/AYOSGdNbLbcHvVxzFbZBZGCe>)
<Dherse[m]> <FreeKill[m]> "Don't you need to configure..." <- Trust me, I am trying to :sob:
<Dherse[m]> Okay, I managed to configure my MPU enough that it doesn't instantly hang, but I'm hitting the following problem: instead it hangs as soon as I try a DMA operation