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<gdamjan[m]1> <JamesMunns[m]> "Zero size is usually an issue..." <- it seems so. if I put the linker flags in .cargo/config.toml, then it's fine.
<gdamjan[m]1> I don't have anything special in the build.rs file
<gdamjan[m]1> ahh, cargo:rustc-link-arg-bins vs cargo:rustc-link-arg - didn't even see it
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<djdisodo[m]> i'm writing avr timer driver for tc1(16bit timer)
<djdisodo[m]> i updated my code for tc0(8bit timer) and trying to improve resolution
<djdisodo[m]> and it's lot worse now and i have no idea why it doesn't work
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<AlexandervanSaas> Nope, manually clocking out 74+ cycles doesn't fix it :(
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<AlexandrosLiarok> Hi all! I am using circular DMA to transmit through high-frequency SPI-bus DACs.
<AlexandrosLiarok> For the control interface, I will need to write to this array concurrently from the DMA reads but only from a single thread. I am assuming that the stores are "atomic" due to the bus matrix arbitration between the DMA and the core so a volatile write should be mostly fine. Do I have to use UnsafeCell/Cell for the array element type and transmute for the embassy interface?
<AlexandrosLiarok> I currently use embassy_stm32 which takes a `&'a [W]` in order to start the DMA transfer.
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<cbjamo[m]> <AlexandervanSaas> "Nope, manually clocking out 74..." <- Can you try flashing the cards with one of the .img files from here: https://github.com/MabezDev/embedded-fatfs/tree/master/embedded-fatfs/resources
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<AlexandervanSaas> <cbjamo[m]> "Can you try flashing the cards..." <- Sure. What do these files do?
<AlexandervanSaas> (vs just formatting from linux)
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<cbjamo[m]> That're just known good fat images.
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<AlexandervanSaas> <cbjamo[m]> "Can you try flashing the cards..." <- This is the result on the small card:... (full message at <https://catircservices.org/_matrix/media/v3/download/catircservices.org/mrzHnIzkMrOaKdQPmCgrqeGk>)
<AlexandervanSaas> The larger card still fails to init.
<AlexandervanSaas> Both flashed with the fat32 image
<AlexandervanSaas> Ah, I had changed the clock speeds to 400KHz. When I revert is to 25Mhz I get this... (full message at <https://catircservices.org/_matrix/media/v3/download/catircservices.org/LybgfbYcYdSHnrFNozsPWzOA>)
<AlexandervanSaas> * Ah, I had changed the clock speeds to 400KHz. When I revert is to 25Mhz I get this on the small card... (full message at <https://catircservices.org/_matrix/media/v3/download/catircservices.org/cVXsofJvcJAHYCXtmhvXOcVG>)
<AlexandervanSaas> * Ah, I had changed the post initialization clock speed to 400KHz. When I revert it to 25Mhz I get this on the small card... (full message at <https://catircservices.org/_matrix/media/v3/download/catircservices.org/WWKrYOzNPCSoDOfEazZfAlCt>)
<AlexandervanSaas> * Ah, I had changed the post initialization clock speed to 400KHz. When I revert it to 25MHz I get this on the small card... (full message at <https://catircservices.org/_matrix/media/v3/download/catircservices.org/ISgpjKFVoxJSaxjwaqgWikXQ>)
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<slabity[m]> Is there a recommended technical analysis crate for embedded systems? I'd like to test a few different averaging algorithms on an RP2040, which doesn't have floating built in
<slabity[m]> I see a couple different ones, like ta and tatk among others