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<re_irc> <James Munns> I'm guessing you're debugging now
<re_irc> <James Munns> but usually that means:
<re_irc> - not fencing everything that needs to be fenced
<re_irc> - (since it's the H7) no clearing dcache/icache as recommended in the datasheet
<re_irc> - not checking all of the appropriate "done" flags, meaning sometimes you race the completion
<re_irc> <James Munns> Lachlan ^ in case that checklist helps :p
<re_irc> <Lachlan> Oh those are useful, thank you
<re_irc> <Lachlan> I don't believe dcache is being cleared
<re_irc> <Lachlan> I patched the hal to output what bank errors are occurring and it appears that the programming sequence is bad
<re_irc> <James Munns> that smells like one of the first two things to me
<re_irc> <James Munns> but that's a wild guess.
<re_irc> <Lachlan> Yeah, hmm
<re_irc> <James Munns> if nothing is immediately apparent, check the errata for that chip
<re_irc> <Lachlan> I believe the flag is getting raised once the flash is locked again after writing
<re_irc> <James Munns> sometimes they'll be like "lol you have to read this twice to actually clear the flag" or "you must wait 4 clock cycles before the state is actually correct"
<re_irc> <Lachlan> Yeah, I don't see anything in erata
<re_irc> <dirbaio> wasnt there a discussion about h7xx-hal flash bugs recently?
<re_irc> <dirbaio> ah it was you 😂
<re_irc> <Lachlan> It was yep lol
<re_irc> <Lachlan> I thought I solved it but I'm not sure if I ended up running in release or not
<re_irc> <Lachlan> It looks like others have a timeout after writing
<re_irc> <James Munns> Do you check all the registers they do?
<re_irc> <James Munns> Some of those reads are side-effectful some times
<re_irc> <James Munns> I wonder if those two extra SR reads checking the error condition make a difference lol
<re_irc> <James Munns> like, they check SR in a loop, then check it two more times after that to check the timeout and the err mask
<re_irc> <James Munns> like what if you add more
<re_irc> let _ = self.periph.sr.read();
<re_irc> let _ = self.periph.sr.read();
<re_irc> <Lachlan> the hal also doesn't check FLASH_SR_WBNE
<re_irc> <Lachlan> but it never seems to go clear
<re_irc> <James Munns> oh, you're doing all the alignment dance necessary, right?
<re_irc> <James Munns> release might get more aggressive with struct/stack packing
<re_irc> <James Munns> which would cause it to fail when you get an unlucky stack frame lol
<re_irc> <Lachlan> I'm not sure?
<re_irc> <Lachlan> Oh, actually, that's a great question
<re_irc> <Lachlan> The buffer itself might not be aligned, you meant
<re_irc> <James Munns> yeah
<re_irc> <James Munns> data is "&[u8]"
<re_irc> <James Munns> which has no alignment guarantee
<re_irc> <dirbaio> it's cpu-copied into FLASH, reads are done like this which needs no alignment https://github.com/stm32-rs/stm32h7xx-hal/blob/master/src/flash.rs#L448
<re_irc> <Lachlan> It looks like the buffer is read using "u32::from_le_bytes" though
<re_irc> <James Munns> you can verify this by copying the stride to a local buffer, e.g.
<re_irc> data: [u8; WHATEVER]
<re_irc> struct Data {
<re_irc> #[repr(align(8))] // or whatever
<re_irc> }
<re_irc> <James Munns> ah, gotcha
<re_irc> <James Munns> (I got burned by nrf52's qspi dma by this)
<re_irc> <dirbaio> oh yeah I hate nrf qspi too! >:(
<re_irc> <James Munns> (when writing in nrf52 qspi dma, both source and dest must be word aligned)
<re_irc> <James Munns> (orrrrrr it just silently copies the data from the ACTUALLY ALIGNED addr, which makes everything wrong)
<re_irc> <James Munns> anyway, time for sleep, good luck :p
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<re_irc> <Lachlan> Thanks :)
<re_irc> <Lachlan> Hope I can figure this out
<re_irc> <Lachlan> It looks like WBNE is never getting cleared, which means the write buffer isn't getting filled it seems
<re_irc> <James Munns> Just noticed
<re_irc> <James Munns> that chromium code writes a whole CONFIG_FLASH_WRITE_SIZE, THEN checks the status flags
<re_irc> <James Munns> while the rust code writes one WORD, then checks the status flags
<re_irc> <James Munns> unsure if it matters, but it is different
<re_irc> <James Munns> Step four says:
<re_irc> > 4. Write one Flash-word corresponding to 32-byte data starting at a 32-byte aligned address.
<re_irc> <James Munns> but the rust code is writing one 32-BIT (cpu) word, not one 32-BYTE (flash) word
<re_irc> <James Munns> Like, I think this should be OUTSIDE the "for chunk" loop: https://github.com/stm32-rs/stm32h7xx-hal/blob/master/src/flash.rs#L453-L463
<re_irc> <James Munns> CC Lachlan (one last time)
<re_irc> <James Munns> (now I'm really going to bed)
<re_irc> <James Munns> (good luck)
<re_irc> <Lachlan> Ohhh
<re_irc> <Lachlan> Let me try that
<re_irc> <Lachlan> Goodnight!
<re_irc> <James Munns> (you probably also need an outer loop that chunks in 32 bytes)
<re_irc> <James Munns> e.g.
<re_irc> for fchunk in data.chunks_exact(32) {
<re_irc> write(chunk);
<re_irc> for chunk in fchunk.chunks_exact(4) {
<re_irc> <dirbaio> hal bugs don't let you sleep huh
<re_irc> <James Munns> I hear there's an errata for that
<re_irc> <James Munns> WONTFIX
<re_irc> <dirbaio> EFIXINGISSUESINSOFTWAREISFREE
<re_irc> <Lachlan> It works!
<re_irc> <Lachlan> Thank you so much y'all!
<re_irc> <Lachlan> I will make a PR
<re_irc> <James Munns> Hell yeah!
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<re_irc> <Chris [pwnOrbitals]> Hi everyone, I’m having a DeviceError(timout) while writing to SD card through embedded-sdmmc on stm32h7 with the HAL. Reading from the SD card goes fine. Any idea how this could be ? Thanks
<re_irc> <Chris [pwnOrbitals]> * DeviceError(timeout)
<re_irc> <Lachlan> Chris [pwnOrbitals]: Do you have to start a transfer first?
<re_irc> <Chris [pwnOrbitals]> uh embedded-sdmmc doesn’t specify this afaik, here’s what I’m using
<re_irc> {
<re_irc> let name : &str = "test.txt";
<re_irc> rprintln!("Writing to card");
<re_irc> <Chris [pwnOrbitals]> Quite simple, and I believe the crate is doing the transfer work
<re_irc> <Chris [pwnOrbitals]> it’s quite close to the official write example https://github.com/rust-embedded-community/embedded-sdmmc-rs/blob/develop/examples/write_test.rs
<re_irc> <Lachlan> Ah right, forgot that there would be a filesystem on top
<re_irc> <Chris [pwnOrbitals]> ( eldruinmaybe )
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<re_irc> <Lachlan> Oh god oh fuck
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<re_irc> <bugadani> wait, deprecating GATs is a real option? 😱
<re_irc> <bugadani> my whole firmware is built around GATs, let's hope it's not what's going to happen
<re_irc> <bugadani> +🤣
<re_irc> <James Munns> "nightly means nightly"
<re_irc> <bugadani> I know, but still
<re_irc> <bugadani> One can hope
<re_irc> <adamgreig> t-lang have to keep the nightly users on their toes somehow :P
<re_irc> <jessebraham> They don't want us to be happy
<re_irc> <jessebraham> (Joking of course)
<re_irc> <James Munns> I think boats' comments are pretty level headed and ring true
<re_irc> <James Munns> it's a splash of cold water, but "get shit done right" is more important than "get shit done", honestly.
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<re_irc> <James Munns> "A good game is only late until it ships, a bad game is bad forever"
<Shell> v much agreeing with boats here tbh.
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<re_irc> <adamgreig> yea, I'm not sure I completely agree with "In general, it's better to offer an incomplete solution than no solution at all."
<re_irc> <adamgreig> anyway, room meeting time again! agenda is https://hackmd.io/hcdyOdpFS_iO-IHm2yJXhg, please add anything you'd like to discuss or announce and we'll start in a few mins
<re_irc> <adamgreig> ok, enough pcb mucking for now, let's start 😅
<re_irc> <adamgreig> a few quick release announcements: cross 0.2.4 and probe-rs 0.13 are out 🎉 (inc. cargo-flash, cargo-embed)
<re_irc> <adamgreig> hm, that's all the announcements from me (though scroll up slightly for news about GATs entering FCP)
<re_irc> <Chris [pwnOrbitals]> Great to see probe-rs evolve :) new features sound great
<re_irc> <adamgreig> anyone else have any announcements?
<re_irc> <adamgreig> ok, on the svd2rust front, the PR for adding a feature gate for each peripheral group has been merged (https://github.com/rust-embedded/svd2rust/pull/617), but separately we're still seeing some issues with generating code for complicated derived fields in 0.24.1, see https://github.com/rust-embedded/svd2rust/issues/625 and https://github.com/rust-embedded/svd2rust/issues/628, though at the moment it should fail to...
<re_irc> ... compile rather than do the wrong thing
<re_irc> <Chris [pwnOrbitals]> Not really an announcement, but I’ve been using Rust to develop the embedded software for a solar sail spacecraft (my company is a french start-up called GAMA) and it’s been going great ! Thank you everyone here for the support, I’ve been asking a lot of questions here :D and overall the ecosystem and community looks very active and healthy :)
<re_irc> <adamgreig> one brief point from me, it's now 2 years since I joined the core team, and since then we haven't had any change in core team membership, maybe something for people to think over: should we rotate core team members? does anyone else want to be involved?
<re_irc> <adamgreig> other than that I'm out of topics for this week, though we haven't quite resolved some of the embedded-hal questions like what to do with nb
<re_irc> <James Munns> (as the only person who has rotated off the core team, I strongly support keeping new faces regularly on the team)
<re_irc> <James Munns> Especially with N=3 core team members, rotating one at a time means there's always a fresh view and historical context.
<re_irc> <Chris [pwnOrbitals]> What does it involve exactly ?
<re_irc> <adamgreig> in theory it's written here: https://github.com/rust-embedded/wg#the-core-team
<re_irc> <adamgreig> in practice it's 99% "run the weekly meeting"
<cr1901> >as the only person who has rotated off the core team <-- japaric?
<re_irc> <James Munns> He's still on there, AFAIK.
<cr1901> ahhh
<re_irc> <burrbull> there is also interesting PR by luojia65 https://github.com/rust-embedded/svd2rust/pull/627 . But it have some questions. Should we rename all field-related types (enums, readers and writers) or only enums?
<re_irc> <adamgreig> oh, that is interesting and a nice idea
<re_irc> <adamgreig> usually the PAC user does not interact with the enum, reader, or writer type names, right? except... in the documentation, where the current names can be quite confusing
<re_irc> <burrbull> enums sometimes we are use
<re_irc> <Chris [pwnOrbitals]> I just read about the weekly driver initiative, is this still going ?
<re_irc> <therealprof> Chris [pwnOrbitals]: In theory, yes. In practise it's more <insert time window here> rather than weekly. 😅
<re_irc> <adamgreig> we should probably remove that from the readme, it's finished as of https://github.com/rust-embedded/wg/issues/39#issuecomment-675661218 and ongoing new drivers are tracked in https://github.com/rust-embedded/awesome-embedded-rust and on the blog
<re_irc> <adamgreig> hah
<re_irc> <adamgreig> I guess the spirit lives on and there are lots of drivers now
<re_irc> <burrbull> all are waiting 1.0 :)
<re_irc> <adamgreig> burrbull: it sounds nice to me, I guess the only downside is maybe a bunch of breaking changes for some PACs
<re_irc> <adamgreig> but I think mostly it wouldn't cause user code to change in most cases?
<re_irc> <burrbull> should not
<re_irc> <adamgreig> do you think better to rename enum+reader+writer then?
<re_irc> <burrbull> Chris [pwnOrbitals]: if you haven't seen it yet https://crates.io/crates/device-driver
<re_irc> <burrbull> adamgreig: I don't have strict opinion. PR renames all of them
<re_irc> <adamgreig> seems ok to me
<re_irc> <adamgreig> ok, anyone have anything else to discuss or shall we close the meeting here?
<re_irc> <Hmvp> I was wondering something
<re_irc> <Hmvp> There is embedded time which sounds somewhat official, and there is fugit
<re_irc> <Hmvp> Is there any consensus about whats best
<re_irc> <Hmvp> Based on the usage numbers I'd say fugit is the place to be... Is it?
<re_irc> <adamgreig> neither are "official" as such, but yea, I've used fugit a bunch recently and it's quite popular
<re_irc> <adamgreig> they are slightly different and maybe one or the other will end up being more suitable - some libraries define a trait that either embedded-time or fugit could fulfil, e.g. rtic, so the user can pick which one to use
<re_irc> <Hmvp> There are two hals that use e-time but at least one has a PR to switch
<re_irc> <jessebraham> We decided on using "fugit" in "esp-hal" for what it's worth
<re_irc> <therealprof> Slightly different focus but both are very useful.
<re_irc> <therealprof> fugit is newer and more modern in its approach and use of Rust features.
<re_irc> <therealprof> The creators of both hang out here, BTW.
<re_irc> <Hmvp> I do encounter some friction with using drivers implement with one while the Hal uses something else...
<re_irc> <therealprof> Indeed, that's not ideal.
<re_irc> <adamgreig> there's occasionally talk of having some shared traits that both could implement, a la embedded-hal, but it's surprisingly tricky
<re_irc> <Hmvp> For some reason I was under the impression that both libraries try to fullfil that role with some extra utility functions...
<re_irc> <adamgreig> well, they both provide types rather than traits
<re_irc> <adamgreig> thanks everyone, let's close the meeting here! I have to run, have a good evening 👋
<re_irc> <Chris [pwnOrbitals]> Thanks for the organization adamgreig, good evening everyone
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<re_irc> <James Munns> get hype dirbaio :D
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<re_irc> <Lachlan> Woah, insanely impressive
<re_irc> <9names (@9names:matrix.org)> Hmvp: how are you counting? crates.io reverse-dep search lists the following HALs as including embedded-time:
<re_irc> stm32f3xx-hal rp2040-hal stm32l0xx-hal lpc55-hal lpc8xx-hal kea-hal ambiq-hal lpc546xx-hal
<re_irc> <Hmvp> 9names: Hmm that must have changed since last time or i must have looked wrong...
<re_irc> <Hmvp> Hmm there are more than two indeed, but those are not quite a big in terms of downloads
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