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<Alex Norman> before I dive further and switch over to nightly, am I correct that rust still requires nightly to use no_std and a custom global alloc? looks like the only thing I need nightly for is logging/panicking on allocation fail?
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<James Munns> Alex Norman: yes (in practice)
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<Alex Norman> okay.. i guess it is what it is.. thought/hoped I'd be able to stay with stable but maybe going to nightly isn't such a big deal.. just have to let my collaborators know to change over
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<gauteh> Has anyone had any issues with nvim+rust-analyzer (coc) on embedded projects where rust-analyzer doesn't find Some/Ok/Result/Option in scope? super-annoying..
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Is there a way to disable cargo feature unification at the workspace level?
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<@azerupi> Hi all!
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I have a repository containing multiple firmwares and some libraries for them. I'm using workspaces to avoid having to go into each sub-directory to build. But there seems to be a lot of friction. The first problem is that workspaces can only have one target specified. So you can't mix target agnostic libraries with target specific firmwares. This problem I managed to solve by having two workspaces. The second problem is that...
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... cargo unifies features at the workspace level. So when you have two firmwares using the same HAL library with different configurations it blows up.
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<@azerupi> Interestingly you can't run "cargo build" but "cargo build -p firmware1" works fine
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<K900> Why do you need those to be workspaces at all then?
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<K900> You won't be able to reuse artifacts between targets in that kind of setup anyway
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<@azerupi> It was for convenience to avoid having to "cd" into each sub-dir and have to modify CI scripts whenever a firmware is added
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<danielzfranklin> It's a technique for having a cargo subcommand that runs arbitrary code. So you can set up `cargo xtask build` to cd into every project and build it
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<@azerupi> Interesting, I'll take a look! Thanks
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<danielzfranklin> This line is the key to making it work, in case you miss it
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<ryan-summers> Generally, I've found it most helpful to just store everything in UTC and then potentially store what TZ the device is in for conversion on a PC when analyzing / downloading data
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<ryan-summers> Not always feasible, but def the easiest option if you have to have TZs
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<dirbaio> solid advice, been doing that until now
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<dirbaio> but now I need the device to do "pin code 1234 is valid mon-fri 9am-5pm *local time*"
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<dirbaio> +:( :(
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<dirbaio> fully offline
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<ryan-summers> Just beware that any timezone implementation you roll will very likely eventually become invalid. There's a number of good talks about this
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<ryan-summers> E.g. if the EU chooses to end daylight saving stime eventually
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<ryan-summers> Legislation changes timezones dynamically, so code will always eventually be wrong
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<dirbaio> yeah
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<ryan-summers> The "fully offline" part is hard. Do you _ever_ have a chance to sync to a server?
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<ryan-summers> You could essentially just regularly update from some server and then cache locally until the next update
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<dirbaio> the device gets PIN codes and stuff in a "config" downloaded dynamically from the server
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<ryan-summers> I'd store the latest time as reported by the server and use that + offset or something?
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<ryan-summers> Or use server time to resync an RTC
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<dirbaio> what I want to avoid is the device being off-by-1-hour if it's offline during a DST change
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<ryan-summers> Yeah was just contemplating that
<Shell>
you can have the server tell you when DST is, theoretically.
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<danielzfranklin> Do you need to make your own timezone db just for your location and download it from the server?
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<dirbaio> yeah, a device has one fixed timezone configured at install time
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<dirbaio> so I don't want the device to have data for all world's timezones :D
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<dirbaio> so perhaps do unrolling like chrono-tz, but for a "sane" period like 5 years?
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<dirbaio> then send that from the server in the config
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<ryan-summers> If you can guarantee that the device pings the server once per DST changeover, you can store the time at which DST starts/ends as well
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<ryan-summers> And then have the server tell you the next DST crossover
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<dirbaio> yeah, that'd be like the "unrolling" with just 1 entry (next dst change)
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<danielzfranklin> dirbaio: I don't think you can know that far in advance when this will change. IIRC it sometimes changes with like a week's notice
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<ryan-summers> I'd just personally lean towards offloading that from firmware by any means possible because updating the server will always be way easier than fixing firmware on all the devices
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<dirbaio> danielzfranklin: hehe well in that case it'll be wrong until the device gets online, there's no way around that
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<danielzfranklin> I just meant you can't make it for five years in the future and save it as a static file, your server needs to fetch it semi-dynamtically
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<dirbaio> ah yeah, true
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<danielzfranklin> * your server
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<dirbaio> the server would have to dynamically unroll from the current tzdb when generating the config
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<dirbaio> blerugh :D
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<ryan-summers> I think all paths point towards the server having to be the driver behind this
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<ryan-summers> TZs are too dynamic otherwise
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<dirbaio> yeah
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<dirbaio> kinda shame it'll be very usecase-specific
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<dirbaio> not sure how an embedded-friendly reusable timezone crate would look like
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<ryan-summers> I honestly avoid anything time related like the plague
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<ryan-summers> Even adding N seconds to an RTC timestamp is super non-trivial
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<danielzfranklin> Wait a second, can you just use a public ntp server?
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<ryan-summers> So i report it as RTC timestamp + N second offset to the server
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<ryan-summers> Because you have to deal with leap years etc. if you want to increment any RTC time
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<dirbaio> danielzfranklin: ntp just gives you precise UTC time doesn't it? you're supposed to convert that to local time yourself
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<danielzfranklin> Yeah that was stupid of me
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<dirbaio> I already have the devices syncing UTC time from my server (custom protocl, not NTP)
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<dirbaio> with crap precision due to low-power super high latency BLE yay
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<dirbaio> ryan-summers: oooof :D
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<dirbaio> I was planning to use chrono for that, hopefully it's not too bloated :D
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<ryan-summers> Does your device/chip not have an RTC you can use?
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<dirbaio> I'm using the nRF's RTC which is more like stm32's LPTIM, it just counts up at 32768hz
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<dirbaio> it's not like stm32's RTC which is "Y/M/D H:M:S"
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<ryan-summers> Oh god, so it's not an RTC at all
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<dirbaio> they call it RTC π€·
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<dirbaio> yeah π
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<ryan-summers> It's more like a timestamp unit
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<ryan-summers> Any hardware mods allowed? Adding an external RTC wouldn't be a bad idea to help out with the design here, but obviously requires more thought
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<dirbaio> hardware already shipped :P
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<ryan-summers> Figured, that's pretty common
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<dirbaio> either way I'm not a fan of adding hardware to avoid having to do stuff in firmware...
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<ryan-summers> Changing requirements? ;)
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<dirbaio> no, I knew we'd want this from day zero, but I figured I can do that in firmware
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<dirbaio> essentially, I currently got the UTC unix timestamp (in 32768hz ticks), and want "Y/M/D H:M:S" from that, in local time
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<ryan-summers> Oh, that's not a fun time
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<dirbaio> hehehe :'(
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<dirbaio> I hope chrono is not too bloated... combined with the custom trimmed down timezone. chrono-tz is definitely out
<Shell>
if you have access to an IP network, many DHCP servers can provide timezone info, btw. :)
<Shell>
that appears to be the standard protocol for sharing timezone info over a network.
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<dirbaio> relying on the user's crap ISP router to do that correctly seems like nightmares π
<Shell>
quite possibly, it depends on the environment the device runs in.
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<dirbaio> it's a consumer product, has to run on _any_ network
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<dirbaio> I've already had lots of fun adding "fixes" to smoltcp to tolerate broken networks and DHCPs...
* Shell
nodnod.
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<dirbaio> adding chrono to convert "utc unix time -> utc Y/M/D H:M:S" increases firmware size by only +4kb!! :D
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<dirbaio> timezones shouldn't add much more if I unroll on server, it's just a lookup then adding the offset
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<dirbaio> so... yay I guess?
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<danielzfranklin> I've spent a while trying to debug a segfault and I've narrowed it down to only occurring when I debug an integration test via rust-analyzer in a workspace set up like the ferrous systems sample (integration test is of a library that is no-std but can run on my laptop, there's a separate workspace called "cross" that only runs on the target).
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Stop reason: signal SIGSEGV: invalid address (fault address: 0x8)
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If I put a panic at the top of the only library function the test calls, segfault. If I instead comment out the call, no segfault.
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The call stack is also interesting because (I think) no user code has run yet
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<danielzfranklin> +(unit tests work fine)
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<danielzfranklin> I'm interested in if other people are using vscode's debug button in this configuration. If it's probably my mistake I'll keep trying to debug, but if this just isn't supported I don't want to spend a huge amount of time on it.
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<adamgreig> room hi everyone, meeting time again! agenda is https://hackmd.io/G5Kr_cXbTealW4JRGZZ9Lg, please add anything you'd like to announce or discuss and we'll start in 5 min :)
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<dirbaio> π
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<adamgreig> OK, let's start! I don't have any announcements for this week, anyone got anything?
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tldr: Rust+Embassy is faster+smaller than C+FreeRTOS :D
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<adamgreig> yea, very cool! fun to win a size contest with C too
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<adamgreig> I don't have any updates on the cortex-m front: I still think it would be interesting to try critical-section for 0.8 and will try it out at some point, and we should probably cut a 0.8 alpha soon too to start testing the new itm stuff. no idea yet on how to make 0.8 less painful a release than 0.7, though.
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<TheSirC> I was wondering if now was the time for questions or if another time might be more appropriate...
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<eldruin> dirbaio: nice! maybe something for the newsletter diondokter ?
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if it gets adopted as "the" way to abstract over critical sections it seems appropriate it has a more official home at the WG
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<dirbaio> oh yeah, wrt critical-section: i'm happy to transfer it to the WG if that's deemed useful
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<adamgreig> TheSirC: if you could hold off until after the meeting, we'll be done within 50 minutes
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<adamgreig> thanks, I think that would be good if we adopt it inside cortex-m/bare-metal
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<adamgreig> not sure if it should be used directly by c-m or abstractly via bare-metal or what though, yet...
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<adamgreig> leaning towards directly in c-m I think
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<dirbaio> perhaps discuss and document the assumptions it has
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<dirbaio> what's exactly the definitions of "program", "thread", "critical section" etc
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<adamgreig> yea
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<dirbaio> for exmaple the "thread = irq number" vs "thread = irq priority level" discussion from a while ago etc
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<adamgreig> those definitions need to be shared by basically everything in its orbit including other wg crates
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<adamgreig> I expect it will tie into things like why we currently mark "enable_interrupt" as unsafe
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<adamgreig> but we clearly need to solve the problem with cortex-m assuming you can always just stop the world to safely share access
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<dirbaio> and also related: definition of Send/Sync
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<dirbaio> multicore etc :P
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<adamgreig> so no biggie :P
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<adamgreig> we have various bits of that floating around, but putting them together would be nice
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<adamgreig> ideally in a way that doesn't suddenly declare rtic or embassy or something to be unsound, lol
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<adamgreig> "you're not allowed to write rust programs any more actually"
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<adamgreig> hmm, not sure what the best starting point is for that but I might at least collate the various things that have been written in the past and annoy you dirbaio some time
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<dirbaio> sounds good!
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<adamgreig> thanks!
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<adamgreig> onto resources, we talked last week about updating the awesome-embedded-rust list with a more prominent section on commonly used shared crates for traits etc
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<adamgreig> the embedded-* stuff like hal, dma, nal, graphics, time?, etc
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<adamgreig> so it's an open task if anyone wants to volunteer for it!
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<adamgreig> in general there might be other opportunities to tidy up the list now it's got a lot of crates on it
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<ythgl> is this just reorging links under a new section?
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<eldruin> yeah, lots of vertical lists
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<adamgreig> at the moment embedded-dma, embedded-time, fugit aren't on the list at all, and we have "component abstraction crates" which includes both "accelerometer" and "radio" alongside "embedded-nal" and "embedded-graphics"
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<dirbaio> embedded-storage
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<therealprof> If we want to stay an "awesome" list we can't go overboard deviating from the official structure though.
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<ythgl> would volunteer, but feel I would be bugging more familiar people too much to be helpful
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<eldruin> oops yeah we should add those
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<adamgreig> therealprof: sure, but I think we get to choose how to be an awesome list, right? in any event we can reorganise the sections to help people navigate it
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<eldruin> maybe we can do things like put all hal impls for the same stm32 family in the same line
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<therealprof> Uhm, funny enough I just checked and we're not even listed on the awesome list list. π
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<dirbaio> so, what's the goal of the CS stuff?
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<dirbaio> it seems to me most of the discusison has centered around the CS pin itself
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<dirbaio> but the original problem that started the discussion is allowing drivers to share SPI buses
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<Lachlan Sneff> Add an βacquire_csβ function to shared-bus?
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<allexoll> has that issue not been solved with I2C?
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<dirbaio> and if the goal is "allow drivers to share a bus" then IMO the solution is to add traits for "SPI device" and "SPI bus", which is what my proposal does https://github.com/rust-embedded/embedded-hal/pull/351
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<dirbaio> drivers get an instance of a "SPI device", which they can use to "lock" the bus then rx/tx data to it
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<adamgreig> how do the drivers control their CS in that case?
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<adamgreig> especially in multi-device scenarios the CS is unlikely to be controlled by the SPI peripheral
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<adamgreig> (whereas at least with one device on the bus some people may use SPI-peripheral-controlled-CS)
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<Lachlan Sneff> The idea would be to use shared-bus to share the SPI bus type?
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<dirbaio> plan is for the "SPI device" impls to lower CS at start of transaction, raise at end of transaction
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<dirbaio> Lachlan Sneff: shared-bus would impl the "device" traits, HALs would impl the "bus" traits
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<dirbaio> with this I'd even say we _don't_ want ManagedCS, even
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<adamgreig> so the HAL would provide a struct that impls SPI-device and the HAL is responsible for having the user provide a CS pin when it constructs that struct and then driving it
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<dirbaio> what if the user wants to tie CS low in the PCB, to save a GPIO pin?
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<adamgreig> and the driver just gets given its "impl SPIDevice" and runs transactions?
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<dirbaio> adamgreig: HAL crates just impl the Bus traits
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<dirbaio> then there's crates implementing "bus sharing", like shared-bus. those would take a bus and share it
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<dirbaio> * make it "shareable", ie allowing having multiple Devices on the same Bus
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<dirbaio> "bus sharing" crates is what would impl the Device trait
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<dirbaio> * traits
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<dirbaio> perhaps embedded-hal itself could have a dumb "bus to device" adapter if you don't want to actually share the bus
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<adamgreig> shouldn't it, otherwise everyone needs to use shared-bus or some other 3rd party crate?
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<adamgreig> probably a lot of use cases (and especially a lot of first use cases) are going to be one device on the bus, so it'd be nice if that was relatively low friction
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<dirbaio> sounds good yup
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<adamgreig> how will those 3rd party non-hal crates implement the CS driving? OutputPin?
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<dirbaio> OutputPin yep
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<dirbaio> or maybe HALs could impl both Bus and Device, to eg take advantage of hardware-CS
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<dirbaio> hardware-CS is a giant mess though
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<therealprof> Sure is.
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<adamgreig> I don't know that there's much point to using hardware cs except when acting as a peripheral
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<adamgreig> but nevertheless HALs seem well placed to implement Device if it's simple enough?
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<dirbaio> e310x-hal already impls this "bus vs device", with builtin sharing
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<dirbaio> well, bus sharing is not that trivial
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<dirbaio> there's tradeoffs
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<dirbaio> how do you do the mutex?
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- critical section
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- RefCell-like, panic/err if already taken
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- async, make the task yield until the other releases it
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- no mutex at all, no sharing
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<dirbaio> how do you do the mutex?
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- critical section
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- async, make the task yield until the other releases it
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- RefCell-like, panic/err if already taken
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<adamgreig> I see, so have e-h provide the no-sharing approach built-in, but let other crates provide alternates that enable sharing, with the HALs just impling Bus?
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<dirbaio> that's the best IMO yep
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<dirbaio> so HALs don't have to impl every flavor of locking
<cr1901>
Only tangentially related, but I wish hals mandated being able to pass a periph ref back to the user in case they need it in an interrupt handler
<cr1901>
I've no idea how to enforce that tho, so I guess I'll just add it to the crates I need it for/open issues to discuss
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<dirbaio> i2c has kinda the same problem btw
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<dirbaio> there's no problem with CS
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<adamgreig> but the sharing's the same, huh
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<dirbaio> but there's still the problem of sharing a bus that has multiple devices between all the drivers
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<almindor> we could abstract the locking mechanism itself so the user can choose, preferably with a HAL-default for simplicity
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<therealprof> Whatever works and makes people happy is fine with me.
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<dirbaio> eldruin: so does the "Bus vs Device" idea sound good to you?
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<almindor> the general principle worked well in e310-hal we just kinda forced the locking
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<almindor> i didn't see it impact performance in any way
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<dirbaio> for example, if I port one HAL, one driver, and shared-bus, and it all works out, would you be happy merging that?
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<dirbaio> almindor: how do you do the locking? critical sections?
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<eldruin> The idea sounds good, but all use cases need to be covered. one problem I highlighted in the PR is what to do if deasserting CS fails while this is done in "drop"
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<ryankurte> i still think the need for "drop()" is a bit of a footgun compared to the closure option
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<dirbaio> yeah, I agree with your comments in the PR, the closure approach is better
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<ryankurte> you lose the inherent ordering which is always a pain with mutexen
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<almindor> CS error handling is difficult to abstract about because it depends on HW vs SW handling. HW de-asserts aren't even visible to the OS in some cases
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<almindor> I'd panic in the detectable cases and call it a day
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<dirbaio> almindor: you mean in like, Linux?
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<dirbaio> +like the RPI?
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<almindor> heh, no sorry about the nomenclature I meant "the running process" :D
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<almindor> e.g. if I use hw managed CS on the e310 I don't really get to see the de-asserts
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<ryankurte> dirbaio: that's fine imo, everything async is a bit cursed pending async traits
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<dirbaio> ah.. well in that case you can assume it won't fail, since it's all on-chip, isn't it?
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<almindor> yeah, and I mean what can you detect as a CS de-assert failure exactly tbh? 90% of pin operations are infallible
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<ryankurte> almindor: yeah, vs. over a USB->SPI guy or with manually toggled pins where you very much could
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<dirbaio> fallible gpio is if you're using eg an i2c gpio expander
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<dirbaio> or a ftdi over usb
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<dirbaio> or similar
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<ryankurte> (this feels like a rehash of the "everything should be fallible" argument which, we've already covered imo)
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<dirbaio> so
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<ryankurte> * "(everything | nothing)
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<dirbaio> if shared-bus had a Device impl that toggles CS, a user could instantiate it with a faillble OutputPin
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<dirbaio> in that case it makes sense that it can propagate the error up, instead of panicking
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<dirbaio> if shared-bus had a Device impl that toggles CS, a user could instantiate it with a faillble OutputPin from, say, a usb ftdi thingy
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<almindor> sure, we already return the error here tho, so it should just work? (tm)
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<dirbaio> yeah, it does Just Work with the closure version
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<dirbaio> the problem was in #351 I proposed making Drop auto-deassert CS, and you can't return an error from Drop
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<dirbaio> so the closure version is better, we'll do that
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<dirbaio> :D
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<dirbaio> so, not sure if anyone wants to add anything
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<dirbaio> I'll change it to closure, then try to get impls up and running, hopefully it works out :D
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<dirbaio> IMO if InputPin has "is_high, is_low" it makes sense for Wait to have "wait_for_high, wait_for_low"
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<dirbaio> it's all a bit bikesheddy
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<dirbaio> there's really no pros/cons for "wait_for_high, wait_for_low" vs "wait_for_state" other than consistency maybe
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<adamgreig> maybe InputPin should have is_state and default implementations of is_high and is_low in terms of it... :/
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<adamgreig> and then same for wait_for_*
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<adamgreig> I don't think it matters too much though...
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<adamgreig> we do already have the PinState enum
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<adamgreig> and set_high/set_low/set_state for OutputPin
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<dirbaio> "is_state(State) -> bool"? or "get_state() -> State"? :D
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<ryankurte> i do love a good default implementation
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<adamgreig> hah, uh, idk...
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<dirbaio> you can't have default impls with today's GAT-async traits
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<adamgreig> you can in the non-async traits at least :P
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<adamgreig> probably just "state() -> State" is the most idiomatic
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<adamgreig> cf "set_state(State)" for OutputPin
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<adamgreig> keep is_high()->bool and is_low()->bool and provide default impls in terms of state() where possible?
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<ryankurte> dirbaio: see previous: everything is expected to be ugly till async trait
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<adamgreig> and then wait_for_high(), wait_for_low(), wait_for_state(State), the first two again default in terms of third?
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<dirbaio> oof
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<adamgreig> does that end up sucking for async :/
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<dirbaio> no, but I really don't see the advantage
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<adamgreig> in keeping all three?
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<dirbaio> if your i2c device irq pin is active low you'll do "wait_for_low()"
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<adamgreig> same reason we have set_high(), set_low(), set_state() in OutputPin
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<eldruin> I don't think a couple missing default impls are too bad for async right now
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<dirbaio> I've never needed "wait_for_state()" to be honest
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<dirbaio> IMO "wait_for_high, wait_for_low" is the most consistent with _today's_ InputPin
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<adamgreig> I'd defo keep wait_for_high/wait_for_low since they are probably the nicest and most commonly used api, and if someone does really need to choose between them at runtime it's not like that's hard to do
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<dirbaio> if we think "state"-oriented APIs are better then we could open an issue/pr to discuss that, then refactor _all_ traits to that, not just async "digital::Wait" ...
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<adamgreig> I guess we could always add wait_for_state with a default impl that calls either wait_for_high or wait_for_low, lol
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<dirbaio> yeah
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<dirbaio> so IMO the "state vs high/low" discussion shouldn't be blocking for merging "Wait"
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<dirbaio> especially since the cost of breaking the async crate will stay low for quite a while
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<adamgreig> ποΈ
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<adamgreig> we're super over time for this meeting, so I think let's wrap it up here
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<chemicstry> hey, has anyone compared the performance of RTT (from probe-rs) and ITM (SWO) logging performance? I was always using the ITM logging for my STM32 projects, because it was way faster than semihosting, so wondering how RTT compares. Does it have any additional features?
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<dirbaio> RTT is super fast if you have a fast probe
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<dirbaio> and you can do host->target channels which I think you can't do with ITM
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<ryan-summers> It depends on how you're using ITM. If you're using ITM as a tracer, there's no CPU overhead at all
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<ryan-summers> E.g. for profiling
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<ryan-summers> Logging is interesting. I imagine the only real difference is that for ITM, you write to the ITM fifo regs, but for RTT you just write to RAM, so it depends on the memory buses of the chip?
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<ryan-summers> But you still have to do the same formatting for each. I doubt there's a significant difference, since I believe the ITM has its own hardware buffer
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<ryan-summers> I imagine the string formatting is likely going to dwarf the actual writes to ITM/RTT
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<ryan-summers> Also, RTT requires a RAM buffer as far as I understand it?
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<chemicstry> I see, I'm developing on a board with st-link v2, which is quite slow with flashing, but if it's the same speed for RTT, then it should be still plenty for debug logs
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<ryan-summers> Both RTT and ITM throughput depend directly on the speed of the probe
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<ryan-summers> RTT will silently drop overflowing data if the probe doesn't read it fast enough though
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<dirbaio> you can configure it to block instead
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<ryan-summers> I tend to use RTT out of simplicity as well, I think the tooling is better (e.g. support from probe-run)
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<chemicstry> I was using ITM, because it was supported by openocd and cortex-debug vscode extension. But now I'm experimenting with the probe-rs-debug, which what I assume is intended to replace openocd + cortex-debug?
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<thejpster> don't forget probe-run does defmt, which generally avoids sending strings and sends unique string IDs over the RTT transport instead. Much faster.
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<thejpster> the formatting happens on your host PC inside the probe-run binary
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<ryan-summers> probe-rs is a massive step up imo from openocd
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<ryan-summers> And yeah, probe-run + probe-rs + RTT is a very common use case
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<ryan-summers> - defmt for lots of folk
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<chemicstry> I was hesitant to use probe-rs because it was missing debugging stuff, but with probe-rs-debug it looks really nice
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<ryan-summers> probe-rs has support for a GDB server too
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<ryan-summers> Plus I think it has a VSCode debug plugin?
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<dirbaio> wohoo I got the timezone stuff working :D
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<dirbaio> with just 4.5kb of bloat
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<dirbaio> plus horrible code in the server to calculate the "unrolled" timezone data for 5 years
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<danielzfranklin> ryan-summers: When I last looked it didn't support break on line number, so I don't think it's ready yet?
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<dirbaio> it does support breakpoints now