sorear changed the topic of #riscv to: RISC-V instruction set architecture | https://riscv.org | Logs: https://libera.irclog.whitequark.org/riscv | Matrix: #riscv:catircservices.org
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<ja_02> in arch/riscv/kernel/cpufeature.c:692
<ja_02> /*
<ja_02> * port & dt-bindings were upstreamed, and so can be set
<ja_02> * These ones were as they were part of the base ISA when the
<ja_02> * unconditionally where `i` is in riscv,isa on DT systems.
<ja_02> */
<ja_02> if (acpi_disabled) {
<ja_02> set_bit(RISCV_ISA_EXT_ZICSR, source_isa);
<ja_02> set_bit(RISCV_ISA_EXT_ZIFENCEI, source_isa);
<ja_02> set_bit(RISCV_ISA_EXT_ZICNTR, source_isa);
<ja_02> set_bit(RISCV_ISA_EXT_ZIHPM, source_isa);
<ja_02> }
<ja_02> does this mean that these CSR fence cntr and hpm always are going to be set when using DT?
<ja_02> and what happens if a platform doesnt have ZICNTR or ZIHPM is there no way to remove them
<jrtc27> zicntr at least is surely part of the userspace abi thanks to rdtime
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<palmer> they're grandfathered in, for compatibility before the counter/timer ISA split off
<ja_02> is there a way to turn them off?
<ja_02> well the last 2
<ja_02> oh i see u need to add them explicitly when using riscv,isa-base
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<palmer> Ya, you'd need a different base ISA. There in "I" from when we started using it
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<dilfridge>
<dilfridge> anyone with rv32 hardware (and a linux on it) around who's willing to run glibc test suite? :)
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<palmer> dilfridge: I think there isn't really any rv32 Linux hardware
<palmer> if there is I'll buy one ;)
<ja_02> nommu there is lol
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<dilfridge> heh
<dilfridge> guess qemu it is then
* dilfridge isn't in the mood yet to start up cross-compiler, kernel, ... build
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<palmer> you could ask Alistair if he's got a setup for testing? he used to care...
<palmer> I just test with buildroot, which isn't going to help much with the glibc testsuite
<dilfridge> I guess I'll compare qemu riscv64 and riscv32, anything that works on 64 and is b0rk on 32 is probably the port
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<palmer> dilfridge: cool, thanks ;)
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<conchuod> ja_02: If you want to turn them off, you either need a "no-zicntr" entry in the isa property and logic to handle it, or make a new version of "i". The latter (I think) will fail to boot more gracefully than the former if you use an old kernel + new devicetree property.
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